Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Micro-computer Application Software Co., Ltd.

Tomoaki Ikeda

Yoshiko Hatano

Junko Kijima

Mamoru Inamura

Kazuhiko Yawata

Kazuhiro Sugiyama

Kazuhioro Sugiyama

To provide a coding device which does not generate a video packet having only a stuffing but can insert a minimum stuffing to prevent an underflow of a buffer in the case in which a video packet has a length limit. A minimum code volume (Tmin) is set for each VOP and a break of a video packet and an insertion of a stuffing are determined such that a code volume (Sc) of the VOP is not smaller than the minimum code volume (Tmin).

Coding device and coding method

An image encoding device is provided that can transmit encoded image data without lowering the frame rate even when the transmission speed of the transmission path is lowered. An encoded region designator selects the region that is to be encoded, in the input image, depending on the bit rate of the transmission path. Only such a region that is designated by the encoded region designator is encoded. The encoded region designator may be one which selects the region that is to be encoded, according to the bit rate of the transmission path, and the motion vector detected by the image encoding circuit. As an alternative, an encoded region designator may be used which selects the region that is to be encoded according to the bit rate of the transmission path, and the information on the designated region supplied from the outside. Also, a selector limiting the number of bits of the signal from the image signal input circuit may be provided, and when the bit rate of the transmission path is lowered, the number of bits of the input image may be adaptively switched.

Image compression of selected regions based on transmission bit rate, motion, and/or region information, and bit selection before compression based on transmission bit rate

IC 5 for exclusive use in wiring control has been used in conventional emtion system which is difficult in coping with various types of logic verification and results in high cost. An emulation system according to the invention comprises: a digital input terminal section 8 to which a digital signal is inputted; a plurality of field programmable gate arrays 1 to 4 for verifying logic of the inputted signal; a digital output terminal section 9 for outputting a signal of which logic has been verified; a wiring control selector section 7 which is connected to the digital input terminal section 8 and to the digital output terminal section 9; and an analog universal region 6 which is connected to said wiring control selector section 7; thereby carrying out wiring control between the wiring control selector section and the plurality of field programmable gate arrays, and wiring control among the plurality of field programmable gate arrays.

Emulation System

In a digital chrominance signal demodulating device receiving a carrier chrominance signal obtained by digitizing an analog composite video signal, a frequency component near the horizontal frequency of the color subcarrier is extracted, and color-difference signals are output. An identifying circuit forms a selection signal for identifying one of the color-difference signals contained in the carrier chrominance signal, within a color burst signal period, on the basis of a system clock and a horizontal sync signal. A selecting circuit selects the color-difference signals on the basis of the selection signal. The color-difference signals obtained by sampling in accordance with the system clock are kept in phase with the color burst signal. Accordingly, the digital chrominance signal can be demodulated by the use of less expensive digital circuits.

Growing community of inventors

Hyogo, Japan

Tomoaki Ikeda