Semiconductor Components Industries, LLC

Tomas Tichy

Karel Ptacek

Dhruv Chopra

Roman Stuler

Lukas Olivik

Roman Mazgut

Systems for power conversion, and controllers and methods for operating a power converter. The method includes receiving high-side and low-side primary signals that drive primary transistors of a power converter. The method also includes receiving a combined drain voltage signal for high-side and low-side synchronous rectifier (SR) transistors of the power converter. The method further includes generating a high-side SR signal based on the low-side primary signal and generating a low-side SR signal based on the high-side primary signal. The method also includes determining high-side and low-side body diode conduction times based on the combined drain voltage signal. The method further includes adjusting the high-side SR signal based on the high-side body diode conduction time and adjusting the low-side SR signal based on the low-side body diode conduction time.

Synchronous rectification control in LLC topology

Synchronous rectification in active clamp flyback power converters. At least some example embodiments are methods including: sensing a first slope of voltage on a secondary winding of the transformer, the first slope indicative of the power converter entering a charge mode of the transformer; modifying, responsive the sensing, an operational state of a secondary rectifier (SR), driver coupled to a secondary rectifier; making the secondary rectifier conductive by the SR driver during a discharge mode of the transformer; sensing a second slope of voltage on the secondary of the transformer, the second slope indicative of ending of the discharge mode of the power converter; and then returning, responsive to sensing the second slope, the SR driver to an original operational state.

Systems and methods of synchronous rectification in active clamp flyback power converters

Synchronous rectification in active clamp flyback power converters. At least some example embodiments are methods including: sensing, based on a rate of change of voltage on a drain of a synchronous rectifier field effect transistor (SR FET), that the power converter has entered a charge mode of a transformer arranged for flyback operation; changing, responsive the sensing, a parameter within a SR driver from an original state to a modified state, the SR driver coupled to the SR FET; making the SR FET conductive during a discharge mode of the transformer; sensing, based on a voltage at the drain of the SR FET, that the discharge mode of the converter has ended; returning, responsive to sensing that the discharge mode has ended, the parameter to the original state.

A synchronous rectifier controller includes an exception timer, one or more blanking timers, and control logic. The control logic may detect a beginning of a conduction phase using a current sense signal. In response to detecting the beginning of the conduction phase, the control logic commences the exception timer, commences a first blanking interval, and asserts the drive signal. In response to an OFF condition being detected, the first blanking interval being elapsed, and the exception timer being running, the control logic de-asserts the drive signal and commences a second blanking interval. In response to an ON condition being detected, the second blanking interval being elapsed, and the exception timer being running, the control logic commences a third blanking interval and asserts the drive signal. The control logic may assert and de-assert the drive signal multiple times while the exception timer is running.

Switching device control with second assertion of drive signal during conduction phase

A method and synchronous rectifier controller uses minimum off and on time blanking to avoid switching the switching transistor at incorrect times responsive to transients in the current sense signal. The minimum off time timer is commenced only when the current sense signal is above a reset threshold, and is reset when the current sense voltage falls below the reset threshold. Resetting the minimum off time timer in this manner avoids false starts of the minimum off time timer due to transients and allows the SRC to properly synchronize with the conduction and blocking phases of rectifier operation.

Method and apparatus for self-synchronization of a synchronous rectifier

A power conversion circuit including an SR MOSFET is provided. A minimum off-time timer for the SR MOSFET is started. A voltage potential at a first terminal of the SR MOSFET is measured. The SR MOSFET is turned on after a rate of change over time of the voltage potential exceeds a first threshold and before the minimum off-time timer expires.

Current sense detection for synchronous rectification

Synchronous rectifier control with second assertion of drive signal during conduction phase

A switched mode power supply, in some embodiments, comprises a synchronous rectification transistor switch including a gate, and it further comprises an output driver coupled to the gate and providing a driving signal to the gate. The driving signal is determined based on a dynamically controllable clamp signal and a prior driving signal.

Precise and dynamic control of synchronous rectification switch voltage in a switched mode power supply

Method and apparatus for synchronous rectifier

In one embodiment, a synchronous rectifier controller is configured to initiate forming an off-time interval for a first period of time responsively to the controller forming a disable state of a switching signal wherein the control circuit maintains the switching signal in the disable state for at least the off-time interval. The controller is also configured to restart forming the off-time interval responsively to a voltage of a synchronous rectifier becoming a first value prior to expiration of the first period of time.

Method of forming a synchronous rectifier controller and structure therefor

In one embodiment, a power supply controller forms a compensation current modulates a value of the feedback signal responsively to a value of a timing control signal used to form a clock signal.

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Jihlava, Czechia

Tomas Tichy