Semiconductor Components Industries, LLC

Cypress Semiconductor Corporation

On Semiconductor Trading, Ltd.

Tomas Geurts

Manuel H Innocent

Sergey Velichko

Marko Mlinar

Robert Michael Guidash

Johan Camiel Julia Janssens

Bartosz Piotr Banachowicz

Dajiang Yang

Richard Scott Johnson

Erez Tadmor

Muhammad Maksudur Rahman

Thomas Cools

Bart Dierickx

David T Price

Minseok Oh

Tom A Walschap

Bart Cremers

Georges Gielen

Gerald LePage

Genis Chapinal

Kai Shen

Joris De Bondt

Ha Le-Thai

Yannick De Witt

Tze Ching Fung

Genis Chapinal Gomez

A time-of-flight (TOF) sensing system may include an illumination module and a sensor module. The sensor module may include an array of sensor pixels, pixel-level readout circuitry, and column-level readout circuitry coupled to the pixel-level readout circuitry via corresponding column lines. Pixel-level readout circuitry may be provided on a per-pixel basis (e.g., dedicated or unshared per-pixel readout circuitry may be provided for each pixel). Pixel-level readout circuitry may include one or more correlated double sampling stages and a storage stage. The storage stage may include a set of capacitors each configured to store different phase data generated by a corresponding pixel for a TOF sensing operation.

Imaging system with time-of-flight sensing

Implementations of a semiconductor device may include a photodiode included in a second epitaxial layer of a semiconductor substrate; light shield coupled over the photodiode; and a first epitaxial layer located in one or more openings in the light shield. The first epitaxial layer and the second epitaxial layer may form a single crystal.

Global shutter sensor systems and related methods

An image sensor may include an array of image pixels. The array of image pixel may be coupled to row control circuitry and column readout circuitry. An image pixel in the array may include a charge integration portion having a photodiode, a floating diffusion region, and a capacitor coupled to the floating diffusion region and may include a voltage-domain sampling portion having three capacitors. High light and low light image level and reset level signals may be sampled and stored at the voltage-domain sampling portion before being readout to the column readout circuitry during a readout operation. The high light reset level signal may be sampled and stored during the readout operation.

Pixel circuitry with voltage-domain sampling

An image sensor may include an array of image pixels. The array of image pixel may be coupled to control circuitry and readout circuitry. One or more image pixels in the array may each include a coupled-gates structure coupling a photodiode at one input terminal to a capacitor at a first output terminal and to a floating diffusion region at a second output terminal. The coupled-gates structure may include a first transistor that sets a potential barrier defining overflow portions of the photodiode-generated charge. Second and third transistors in the coupled-gates structure may be modulated to transfer the overflow charge to the capacitor and to the floating diffusion region at suitable times. The second and third transistors may form a conductive path between the capacitor and the floating diffusion region for a low conversion gain mode of operation.

Image pixels with coupled-gates structures

An image sensor may include an array of image sensor pixels. Each pixel in the array may be a global shutter pixel having a first charge storage node configured to capture scenery information and a second charge storage node configured to capture background information generated as a result of parasitic light and dark noise signals. The first and/or second charge storage nodes may each be provided with an overflow charge storage to provide high dynamic range (HDR) functionality. The background information may be subtracted from the scenery information to cancel out the desired background signal contribution and to obtain an HDR signal with high global shutter efficiency. The charge storage nodes may be implemented as storage diode or storage gate devices. The pixels may be backside illuminated pixels with optical diffracting structures and multiple microlenses formed at the backside to distribute light equally between the two charge storage nodes.

Methods and circuitry for improving global shutter efficiency in backside illuminated high dynamic range image sensor pixels

An imaging system may include an image sensor having an image sensor. The image sensor may include an image sensor pixel array coupled to row control circuitry and column readout circuitry. The image sensor pixel array may include a plurality of image sensor pixels. Each image sensor pixel may include a photosensitive element configured to generate charge in response to incident light, a first charge storage structure configured to accumulate an overflow portion of the generated charge for a low gain signal and a second charge storage structure configured to store a remaining portion of the generated charge for a high gain signal. Each image sensor pixel may also include a dedicated overflow charge storage structure interposed between the first charge storage structure and a floating diffusion region.

Imaging systems and methods for generating high dynamic range images

Image sensors may include multiple vertically stacked photodiodes interconnected using vertical deep trench transfer gates. A first n-epitaxial layer may be formed on a residual substrate; a first p-epitaxial layer may be formed on the first n-epitaxial layer; a second n-epitaxial layer may be formed on the first p-epitaxial layer; a second p-epitaxial layer may be formed on the second n-epitaxial layer; and so on. The n-epitaxial layers may serve as accumulation regions for the different epitaxial photodiodes. A separate color filter array is not needed. The vertical transfer gates may be a deep trench that is filled with doped conductive material, lined with gate dielectric liner, and surrounded by a p-doped region. Image sensors formed in this way may be used to support a rolling shutter configuration or a global shutter configuration and can either be front-side illuminated or backside illuminated.

Image sensors with vertically stacked photodiodes and vertical transfer gates

An image sensor may include an array of image pixels. Control circuitry coupled to the array of pixels may be configured to operate the image pixels in an overflow mode of operation, in which each pixel generates an overflow image signal and a complete image signal from a single exposure time period. The overflow image signals and the complete image signals from the pixels may be used to generate a high dynamic range image. While the floating diffusion region in each pixel is not in use, control circuitry may control that pixel to generate a reference signal at the floating diffusion region indicative of pixel-specific dark signal noise. Processing circuitry may mitigate for dark signal non-uniformity across the pixels by correcting the complete image signals using the reference signal to remove dark signal noise in the complete image signals.

Imaging systems and methods for reducing dark signal non-uniformity across pixels

An image sensor may include an imaging pixel, readout circuitry, and amplification circuitry coupled between the imaging pixel and the readout circuitry. Correlated double sampling may be used to sample a reset voltage and a signal voltage from the imaging pixel. The difference between the reset voltage and the signal voltage may reflect the amount of light received by the imaging pixel during an integration time. The amplification circuitry may amplify the difference between the reset voltage and the signal voltage. The amplification circuitry may include a source follower transistor coupled between first and second capacitors, with the second capacitor having a greater capacitance than the first capacitor. The amplification circuitry may be formed only from n-type metal-oxide-semiconductor transistors. The amplification circuitry may consume power dynamically as opposed to consuming static power for minimal power consumption requirements.

Image sensors with in-pixel amplification circuitry

Image sensors may include pixel circuitry to enable per-pixel integration time and read-out control. Two transistors may be coupled in series for per-pixel control, with one of the transistors being controlled on a row-by-row basis and the other transistor being controlled on a column-by-column basis. The two transistors in series may be coupled directly to each other without any intervening structures. Two transistors in series between a photodiode and a power supply terminal enables per-pixel control of starting an integration time, two transistors in series between a photodiode and a charge storage region enables per-pixel control of ending an integration time, and two transistors in series between a charge storage region and a floating diffusion region enables per-pixel control of read-out.

Imaging sensors with per-pixel control

An image sensor pixel may include a photodiode that generates first charge for a first frame and second charge for a second frame, first and second storage gates coupled to the photodiode, a floating diffusion coupled to the first storage gate through a first transistor, a second transistor coupled to the second storage gate, and a capacitor coupled to the floating diffusion through a third transistor. The image sensor pixel may output image signals associated with the first charge generated by the photodiode for the first image frame while the photodiode concurrently generates the second charge for the second image frame. The second storage gate may be used to store overflow charge. Overflow charge for the second frame may be stored at the second storage gate while image signals associated with the first image frame are read out from capacitor and the floating diffusion.

Imaging systems having dual storage gate overflow capabilities

A high dynamic range imaging pixel may include a photodiode that generates charge in response to incident light. Charge from the photodiode may be coupled to a voltage supply and discarded or transferred to a charge storage region such as a storage diode. Alternating between discarding and integrating charge enables flicker mitigation. When the generated charge in the charge storage region exceeds a first charge level, the charge may overflow through a first transistor to a first storage capacitor. When the generated charge exceeds a second charge level that is higher than the first charge level, the charge may overflow through a second transistor. The charge that overflows through the second transistor may alternately be coupled to a voltage supply and drained or transferred to a second storage capacitor for subsequent readout. Diverting more overflow charge to the voltage supply may increase the dynamic range of the pixel.

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Tomas Geurts