Jds Uniphase Corporation

Zeevo, Inc.

Tom Truong

Barthelemy Fondeur

Robert Brainard

Sanjay M Thekdi

Anca L Sala

Anantharaman Vaidyanathan

David K Nakamoto

The present application relates to a method of fabricating planar circuits using a photo lithographic mask set, to the photo lithographic mask set, and to a planar circuit fabricated with the photo lithographic mask set. The instant invention involves separating a photo lithographic mask into two parts, namely, a master mask and one or more slave masks. The master mask and the one or more slave masks form a photo lithographic mask set that is used iteratively to fabricate the planar circuits. In particular, the master mask is used as a template to provide the general layout for the planar circuit, while each slave mask is varied to tune and/or tailor the planar circuit. Since only a small portion of the planar circuit is redesigned and/or rewritten as a new mask (i.e., the slave mask), the instant invention provides a simple and cost effective method for optimizing planar circuits. Furthermore, since most mask errors will originate from the master mask, the instant invention provides an efficient method of correcting errors on planar circuits using the one or more slave masks.

Planar circuit optimization

A crystal oscillator circuit includes a crystal driven by a variable current source having a transconductance device with transconductance dependent on current, and a CMOS buffer circuit for receiving a sinusoidal signal from the crystal and providing a square wave output signal. The buffer circuit includes first and second bi-level buffers capacitively coupled to receive sinusoidal signals and operating in a push-pull mode for providing square wave output signals from each of said first and second buffers, and a third buffer driven by output signals from the first and second buffers, whereby duty cycle of the first and second buffers is controlled by bias voltages applied to CMOS transistors in the buffers. The circuit further includes a bias current circuit which provides through the variable current source a bias current, I-bias, which is set to provide an optimum transconductance for oscillation start-up and a reduced regulated bias current once oscillation voltage increases, thereby preventing runaway oscillations.

Oscillator circuit with signal buffering and start-up circuitry

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San Jose, CA, United States of America

Tom Truong