Stmicroelectronics Gmbh

Tom Quoc Lao

Anthony M Chiu

Harry Michael Siegel

Michael J Hundt

Robert Henry Bond

Krishnan Kelappan

Mike Hundt

A system and method is disclosed for venting pressure from an integrated circuit package that is sealed with a lid. During a surface mount process for mounting a ball grid array integrated circuit package to a circuit board the application of heat (1) weakens the solder that seals a soldered lid, and (2) increases vapor pressure within the integrated circuit package. This may cause the soldered lid to move out of its soldered position. The present invention solves this problem by providing an integrated circuit with a solder mask that has a plurality of solder mask vents that form a plurality of vapor pressure vents through the solder. The vapor pressure vents prevent the occurrence of any increase in vapor pressure that would shift the soldered lid out of its soldered position. An alternate embodiment vents pressure through an epoxy layer that is used to attach a lid by epoxy.

System and method for venting pressure from an integrated circuit package sealed with a lid

A system and method is disclosed for controlling a height and a planarity of an integrated circuit die. In one advantageous embodiment of the invention, a plurality of patterned metal stops are fabricated on an integrated circuit substrate and covered with die attach material. An integrated circuit die is inserted into the die attach material and placed into a clamping mechanism of a molding machine. The clamping mechanism (1) compresses the die into the die attach material, (2) rotates the die into parallel alignment with the substrate, and (3) pushes the die into contact with the patterned metal stops. In this manner the die height and the die planarity are precisely controlled.

System and method for controlling integrated circuit die height and planarity

A system and method is disclosed for venting pressure from an integrated circuit package that is sealed with a lid. During a surface mount process for mounting a ball grid array integrated circuit package to a circuit board the application of heat () weakens the solder that seals a soldered lid, and () increases vapor pressure within the integrated circuit package. This may cause the soldered lid to move out of its soldered position. The present invention solves this problem by providing an integrated circuit with a solder mask that has a plurality of solder mask vents that form a plurality of vapor pressure vents through the solder. The vapor pressure vents prevent the occurrence of any increase in vapor pressure that would shift the soldered lid out of its soldered position. An alternate embodiment vents pressure through an epoxy layer that is used to attach a lid by epoxy.

A battery pack for two 2032 batteries includes a molded plastic base having an upper surface on which the batteries are received and columnar standoff posts projecting from a bottom surface, as well as a molded plastic housing sized to receive the batteries and an upper portion of the base and having ears through which screws are passed to be received by press-fit threaded inserts mounted on an integrated circuit packaging substrate and tightened to a predetermined torque. Like terminals of the batteries are joined by a welded plate, with conductive pins connected to each plate extending through the base and projecting from a bottom surface of the battery pack. A mounting guide ensures connection of proper pins to corresponding receptacles of an integrated circuit packaged during mounting of the battery pack on the integrated circuit packaging substrate.

BGA memory module with battery pack

A heat sink is mounted on an integrated circuit die within a Chip Scale Package, without a substrate supporting the heat sink. The heat sink may be mounted on a central portion of the active surface of the integrated circuit die without impeding wire bond connection of bond pads around peripheral region of the active surface. Alternatively, the heat sink may be mounted on the backside of one integrated circuit die within a stacked configuration of integrated circuits having facing active surfaces. The required form factor for Chip Scale Packages is maintained while providing heat dissipation for high input/output devices. The heat sink may be wire bonded to a ground connection to provide the packaged integrated circuit with shielding from electrical or electromagnetic interference.

Thermally enhanced chip scale package

An apparatus and method for producing a wrap-around interconnect substrate ( ) comprising a substrate ( ) having semi-circular vias ( ) having openings ( ) created by separating through cylindrical vias ( ) that were positioned along cutting lines ( ) that formed part of an integrated circuit substrate strip ( ) prior to separation, is disclosed.

Wrap-around interconnect for fine pitch ball grid array

An apparatus and method for producing a wrap-around interconnect substrate (60) comprising a substrate (42) having semi-circular vias (62) having openings (64) created by separating through cylindrical vias (62) that were positioned along cutting lines (46a, 46b) that formed part of an integrated circuit substrate strip (40) prior to separation, is disclosed.

Growing community of inventors

Murphy, TX, United States of America

Tom Quoc Lao