Infineon Technologies Ag

Tom Moller

Larry C Leighton

Prasanth Perugupalli

Bengt Ahl

Henrik Hoyer

Nagaraj V Dixit

A method for manufacturing a power transistor circuit includes securing a die to a substrate, the die comprising a transistor having an input terminal and an output terminal. One or more performance characteristics of the transistor are measured. Using one or more wire sets, the transistor input terminal is electrically connected to one or more input matching elements and an input signal lead. The impedance of the one or more wire sets, as determined by selecting a desired number and/or length of the wires in each set, is selected based at least in part on the measured transistor performance characteristic(s). Similarly, using one or more additional wire sets, the transistor output terminal is electrically connected to one or more output matching elements and an output signal lead, wherein the impedance of the additional wire sets is selected based at least in part on the measured transistor performance characteristic(s).

Bond wire tuning of RF power transistors and amplifiers

A laterally diffused metal oxide semiconductor (LDMOS) power package includes a conductive mounting flange mounted on a heat sink and electrically connected to a dielectric substrate of a printed circuit board. A plurality of transistors are mounted on the top surface of the mounting flange. Each of the transistors has an input terminal, an output terminal, and a ground terminal, with the ground terminal of each transistor being electrically coupled to the top surface of the mounting flange. A plurality of parallel ground signal return paths are provided to electrically couple the top surface of the mounting flange to the dielectric substrate, thereby reducing resistance and inductance in the ground signal path and increasing the efficiency of the power package.

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Gilroy, CA, United States of America

Tom Moller