Cadence Design Systems, Inc.

Tabula, Inc.

Tom Kronmiller

Steven L Teig

Etienne Jacques

Andrew F Siegel

Jason Rupert Redgrave

Herman Henry Schmit

Brad Hutchings

Some embodiments provide a configurable integrated circuit (IC) that has several configurable circuits and several user design state (UDS) circuits. The UDS circuits store user-design state values. The configurable IC also includes a debug network communicatively coupled to the UDS circuits. The debug network is for retrieving the user-design state values of several UDS circuits at various stoppages of the operation of the IC without retrieving configuration data that is used to configure the configurable circuits of the IC. The retrieved user-design state values at each stoppage are used as the checkpointed state of the IC while debugging the IC. In some embodiments, the debug network allows the checkpointing of only certain portions of the configurable IC.

Checkpointing user design states in a configurable IC

Some embodiments of the invention provide novel methods for representing items in a design layout. For instance, they use a method that identifies several half-planes, that when intersected, define the shape of the item. Some embodiments use a method that (1) identifies a first set of location data for the item with respect to a first coordinate system, (2) identifies a second set of location data for the item with respect to a second coordinate system, and (3) specifies the item in terms of the first and second set of location data. In some embodiments, both the first and second coordinate systems have first and second coordinate axes. Some embodiments use a method that receives a first set of data that defines the item with respect to a first coordinate system of the design layout.

Method and apparatus for representing items in a design layout

Some embodiments of the invention provide a method for processing a hierarchical data structure that includes a parent data set and first and second child data sets of the parent data set. The parent and first and second child data sets includes several data tuples. From the second child data set, the method identifies a first data tuple that is not in the first child data set and that is relevant for the processing of the data tuples within the first child data set. The method then assigns the first data tuple to the first child data set and then processes the first child data set based on the data tuples included in the first child data set and assigned to the first child data set. In some embodiments, the method also identifies, from the parent data set, a second data tuple that is not in the first child data set and that is relevant for the processing of the data tuples within the first child data set. The method assigns the identified second data tuple to the first child data set, and processes the first child data set based on this data tuple.

Hierarchical data processing

Some embodiments of the invention provide a method of specifying routes in a design layout, where each route has a set of segments and each segment has a shape. The method receives a route, and for each segment of the received route, identifies n half planes that when intersected provide the shape of the segment. In some embodiments, n is an integer greater than 4. Some embodiments provide a method of generating a representation of a route formed by several adjoining polygons. For each polygon, this method (1) identifies a direction for the polygon, (2) defines a segment along the identified direction, where the segment has a starting point and an ending point, and (3) identifies more than four values that specify more than four half planes in conjunction with the starting and ending points of the segment, where the intersection of the specified half planes provides the shape of the polygon. Some embodiments provide a design layout that has several routes that are each represented by a set of segments. Each particular segment has an associated shape, which is specified by a data-storage index for the particular segment. Each particular data-storage index identifies a particular set of n values that are stored in a data storage, where, in some embodiments, n is an integer greater than 4.

Plane representation of wiring in a design layout

Some embodiments of the invention provide novel methods for removing acute angles form routes in a design layout. The method reacts a route with several segments. It then identifies an acute angle between first and second contiguous segments of the route. The method next inserts a third segment between the first and second segments, where the third segment has an associated shape that fills the acute angle between the first and second segments.

Removal of acute angles in a design layout

Geometric objects, such as polygons, are defined in a multi-dimensional data space, and are represented by data segments. 'N' dimensional hierarchical trees, or 'ng' trees, are generated to organize the data segments into &#x201c;outside child nodes&#x201d; and &#x201c;inside child nodes&#x201d; in accordance with a discriminator value. One of &#x201c;n&#x201d; sides of a polygon is selected as the discriminator value. To create the ng tree, data segments are designated as &#x201c;outside child nodes&#x201d; if a data segment is outside the plane defined by the discriminator value, and data segments are selected as &#x201c;inside child nodes&#x201d; if the data segment is inside the plane defined by the discriminator value. This process of partitioning data segments into inside child nodes and outside child nodes is repeated recursively through each level of the ng tree. Techniques to represent diagonal interconnect lines of regions defined in a multidimensional design layout of an integrated circuit are disclosed. Techniques to extract capacitances exerted on diagonal interconnect lines in an integrated circuit (&#x201c;IC&#x201d;) design are also disclosed.

Methods and apparatus for storing and manipulating diagonal interconnect lines of a multidimensional integrated circuit design

The invention is directed towards method and apparatus for representing multidimensional data. Some embodiments of the invention provide a two-layered data structure to store multidimensional data tuples that are defined in a multidimensional data space. These embodiments initially divide the multidimensional data space into a number of data regions, and create a data structure to represent this division. For each data region, these embodiments then create a hierarchical data structure to store the data tuples within each region. In some of these embodiments, the multidimensional data tuples are spatial data tuples that represent spatial or geometric objects, such as points, lines, polygons, regions, surfaces, volumes, etc. For instance, some embodiments use the two-layered data structure of the invention to store data relating to geometric objects (such as rectangles) that represent interconnect lines of an IC in an IC design layout.

Method and apparatus for representing multidimensional data

Geometric objects, such as polygons, are defined in a multi-dimensional data space, and are represented by data segments. 'N' dimensional hierarchical trees, or 'ng' trees, are generated to organize the data segments into &#x201c;outside child nodes&#x201d; and &#x201c;inside child nodes&#x201d; in accordance with a discriminator value. One of &#x201c;n&#x201d; sides of a polygon is selected as the discriminator value. To create the ng tree, data segments are designated as &#x201c;outside child nodes&#x201d; if a data segment is outside the plane defined by the discriminator value, and data segments are selected as &#x201c;inside child nodes&#x201d; if the data segment is inside the plane defined by the discriminator value. This process of partitioning data segments into inside child nodes, and outside child nodes is repeated recursively through each level of the ng tree. Techniques to represent diagonal interconnect lines of regions defined in a multidimensional design layout of an integrated circuit are disclosed. Techniques to extract capacitances exerted on diagonal interconnect lines in an integrated circuit (&#x201c;IC&#x201d;) design are also disclosed.

Methods and apparatus for extracting capacitances exerted on diagonal interconnect lines in an integrated circuit design

Geometric objects, such as polygons, are defined in a multi-dimensional data space. The geometric objects are represented by data segments for processing in a computer. &ldquo;N&rdquo; dimensional hierarchical trees, or &ldquo;ng&rdquo; trees, are generated to organize the data segments into &ldquo;outside child nodes&rdquo; and &ldquo;inside child nodes&rdquo; in accordance with a discriminator value. The discriminator value is selected for each layer or discriminator dimension in the ng tree. For the ng tree, one of &ldquo;n&rdquo; sides of a polygon is selected as the discriminator value. To create the ng tree, data segments are designated as &ldquo;outside child nodes&rdquo; if a data segment is outside the plane defined by the discriminator value, and data segments are selected as &ldquo;inside child nodes&rdquo; if the data segment is inside the plane defined by the discriminator value. This process of partitioning data segments into inside child nodes and outside child nodes is repeated recursively through each level of the ng tree. The ng tree has application to represent diagonal interconnect lines of regions defined in a multidimensional design layout of an integrated circuit.

Methods and apparatus for manipulating polygons in a multidimensional space

The mechanism is directed towards method and apparatus for representing multidimensional data. Some embodiments of the invention provide a two-layered data structure to store multidimensional data tuples that are defined in a multidimensional data space. These embodiments initially divide the multidimensional data space into a number of data regions, and create a data structure to represent this division. For each data region, these embodiments then create a hierarchical data structure to store the data tuples within each region. In some of these embodiments, the multidimensional data tuples are spatial data tuples that represent spatial or geometric objects, such as points, lines, polygons, regions, surfaces, volumes, etc. For instance, some embodiments use the two-layered data structure of the invention to store data relating to geometric objects (such as rectangles) that represent interconnect lines of an IC in an IC design layout.

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Chapel Hill, NC, United States of America

Tom Kronmiller