Nvidia Corporation

Tom J Verbeure

Robert Jan Schutten

Gerrit Ary Slavenburg

Thomas Francis Fox

Rudolf Bloks

Rouslan Lyubomirov Dimitrov

Morgan Samuel McGuire

Sau Yan Keith Li

Josef Bo Spjut

Jens Roever

Joohwan Kim

Lars Nordskog

Benjamin Boudaoud

Timothy John Bornemisza

Seth P Schneider

Marcel Dominicus Janssens

Rudi Bloks

Cody J Robson

Luis Mariano Lucas

A display device for measuring the end-to-end latency of a computing system. The computing system includes an input device, a computing device, and the display device. The display device is directly connected with the input device and receives input data packets generated by the input device in response to received user input events. The display device passes the input packets to the computing device for graphics processing. The display device measures the end-to-end latency comprising the sum of three latencies. A first latency comprises an input delay of the input device. A second latency comprises an amount of time between generation of the input packet and a corresponding change in pixel values caused by the input event at the display device. A third latency comprises a display latency. The display device also displays latency information associated with the measured end-to-end latency.

System-latency-aware display device

A display controller within a display device includes a serial peripheral interface (SPI) that coordinates the updating of current settings for groups of light-emitting diodes (LEDs). The SPI controller operates in synchrony with a liquid-crystal display (LCD) vertical scan position in order to update the current settings for rows of LEDs in parallel with the updating of nearby rows of LCD pixels. When updating a row of LEDs, the SPI controller executes one or more SPI transactions included in an SPI program to write current settings for multiple LEDs nearly simultaneously. A compiler generates the SPI program based on the topology of LEDs included in the display device.

Techniques for updating light-emitting diodes in synchrony with liquid-crystal display pixel refresh

In various examples, defective cells from a first layer of a multi-layer liquid crystal display (LCD) may be compensated for by using one or more cells from a second layer of the multi-layer LCD. Color values corresponding to additional cells of the first layer that may be affected by the compensation of the second layer may also be adjusted to counter the compensation in order to generate a final pixel or sub-pixel value that closely mirrors the desired value from the image data. In addition, backlighting of the LCD may be adjusted such that one or more cells of the backlights&#x2014;e.g., individual light-emitting diodes (LEDs)&#x2014;may be adjusted to further aid in compensating for or mitigating the appearance of the defective cell.

Defective pixel identification and mitigation in multi-layer liquid crystal displays

A display controller progressively updates LEDs and LCD pixels in scanline order as portions of an image are scanned into a frame buffer. The display controller analyzes a first portion of the image that includes a first pixel value associated with a first LCD pixel. The display controller identifies a first LED that contributes luminance to the first LCD pixel and determines an LED current setting for the LED based on the first pixel value. The display controller then identifies a second LCD pixel that resides above the first LED and is associated with a second pixel value. The display controller configures the second LCD pixel based on the second pixel value and luminance contributions received at the second LCD pixel. Accordingly, the display controller need not wait for the entire image to be scanned into the frame buffer before initiating display of the image.

Low-latency high-dynamic range liquid-crystal display device

In various examples, images rendered by a processor&#x2014;such as a graphics processing unit (GPU)&#x2014;may be scanned out of memory in a middle-out scan order. Various architectures for liquid crystal displays (LCDs) may be implemented to support middle-out scanning, such as dual-panel architectures, ping-pong architectures, and architectures that support both top-down scan order and middle-out scan order. As a result, display latency within the system may be reduced, thereby increasing performance of the system&#x2014;especially for high-performance applications such as gaming.

Middle-out technique for refreshing a display with low latency

A method, computer program product, and system perform DC balancing for a variable refresh rate display panel based on regions. A first portion of a first image is displayed on a first region of a screen of a display device using a spatial inversion pattern and a first polarity of a temporal polarity pattern for the first region of the screen of the display device. A second polarity of a second temporal polarity pattern for a second region of the screen of the display device is determined and a second portion of the first image is displayed on the second region of the screen of the display device using the spatial inversion pattern and the second polarity of the second temporal polarity pattern.

Regional DC balancing for a variable refresh rate display panel

A method, computer program product, and system perform gamma correction for a variable refresh rate display panel. An image is received for display on a screen of a display device. The image is adjusted based on gamma correction factors that are dependent on a variable refresh rate of the display device and the adjusted image is output for display on the screen of the display device.

Variable refresh rate gamma correction

A method, computer program product, and system for cursor handling in a variable refresh rate environment are disclosed. The method includes the steps of receiving a first image, combining a cursor at a first position with the first image to produce a first combined image, and displaying the combined image on a variable refresh rate display device. The method also includes the steps of determining that a refresh timeout associated with the variable refresh rate display device has occurred, and then, after determining that a second image has not been generated, combining the cursor at a second position with the first image to produce a second combined image for display. The logic for implementing the method may be included in a graphics processing unit or within the variable refresh rate display device itself.

Cursor handling in a variable refresh rate environment

A method, computer program product, and system for selectively disabling temporal dithering is disclosed. The method includes the steps of configuring a display device to refresh utilizing a dynamic refresh rate to display images and selectively disabling temporal dithering of the images based on the dynamic refresh rate. Selectively disabling temporal dithering may comprise determining a dynamic refresh rate associated with a current frame of image data and disabling temporal dithering for the current frame of image data when the dynamic refresh rate is less than a first threshold value, or enabling temporal dithering for the current frame of image data when the dynamic refresh rate is greater than or equal to a second threshold value.

Refresh rate dependent adaptive dithering for a variable refresh rate display

A method for driving a display panel having a variable refresh rate is disclosed. The method comprises detecting a condition that results in a charge accumulation in the display panel using an accumulated difference in time duration between frames of positive polarity and frames of negative polarity received from an image source. The DC imbalance is a result of a frame pattern comprising alternating frames of differing polarities, wherein frames of positive polarity within the frame pattern are of a different time duration than frames of negative polarity, and wherein the frame pattern results in an accumulation of charge in pixels of the display panel. The method also comprises correcting for the charge accumulation by disrupting the frame pattern.

DC balancing techniques for a variable refresh rate display

A method, computer program product, and system for adjusting a dynamic refresh frequency of a display device are disclosed. The method includes the steps of obtaining a current frame duration associated with a first image, computing, based on the current frame duration, a repetition value for a second image, and repeating presentation of the second image on a display device based on the repetition value. The logic for implementing the method may be included in a graphics processing unit or within the display device itself.

Dynamic frame repetition in a variable refresh rate system

A system, method, and computer program product are provided for combining low motion blur and variable refresh rate in a display. In one embodiment, a hold-type display is operated in a first mode of operation where the hold-type display is dynamically refreshed such that the hold type display handles updates to image frames at unpredictable times and where for each of the image frames a backlight of the hold-type display is activated for an entire duration of display of the image frame. Additionally, it is determined that at least one predefined condition has been met. Further, in response to the determination, the hold-type display is operated in a second mode of operation where the hold-type display is statically refreshed such that the hold-type display handles updates to image frames at regular intervals and where for each of the image frames the backlight of the hold-type display is flashed.

System, method, and computer program product for combining low motion blur and variable refresh rate in a display

A method for driving a display panel having a variable refresh rate is disclosed. The method comprises receiving a current input frame from an image source. Next, it comprises determining a number of re-scanned frames to insert between the current input frame and a subsequent input frame, wherein the re-scanned frames repeat the input frame, and wherein the number of re-scanned frames depends on the minimum refresh interval (MRI) of the display panel. Further, it comprises calculating respective intervals at which to insert the re-scanned frames between the current input frame and the subsequent input frame. Subsequently, it comprises determining if a charge accumulation in pixels of the display panel has crossed over a predetermined threshold value. Finally, responsive to a determination that the charge accumulation has crossed over a predetermined threshold value, it comprises performing a counter-measure to remediate the charge accumulation.

Techniques for avoiding and remedying DC bias buildup on a flat panel variable refresh rate display

A modulated clock device is provided that includes an update device for updating a phase of the modulated clock device. In one example, the update device includes an update phase multiplexer coupled to an output phase multiplexer of an output clock generator and configured to receive an input clock signal and one or more phases of the input clock signal; an output phase fractional counter coupled to the update phase multiplexer and configured to receive an update clock signal and to generate an output phase; and an update phase device coupled to the output phase fractional counter and to the update phase multiplexer. The output phase fractional counter is further configured to send the output phase to the output phase multiplexer and to the update phase device. The update phase device is configured to generate an update phase and to send the update phase to the update phase multiplexer.

Growing community of inventors

Sunnyvale, CA, United States of America

Tom J Verbeure