Sharp Kabushiki Kaisha Corporation

Semiconductor Energy Laboratory Co., Ltd.

Tohru Ueda

Yasumori Fukushima

Yoshinori Higami

Kenta Nakamura

Masahito Gotoh

Osamu Nakamura

Hiroshi Shibata

Kazuhiko Inoguchi

Fumitoshi Yasuo

Kunio Kamimura

Shunichi Naka

The problem is to provide a technology to reduce a light leakage current in order to obtain a good display. One kind or plurality kinds of elements chosen from argon, germanium, silicon, helium, neon, krypton, and xenon are implanted in a crystalline semiconductor layer, to distribute crystal defects due to the aforementioned element implantation by uniform and suitable density in the semiconductor film, making recombination centers of carriers, to thereby suppress alight sensitivity without spoiling a high degree of carrier movement included in a crystalline semiconductor layer.

Semiconductor device and manufacture method thereof

A liquid crystal display device includes an active matrix substrate; a counter substrate; and a liquid crystal layer interposed between the active matrix substrate and the counter substrate. The active matrix substrate includes a plate; a thin film transistor provided on the plate; and a side light shielding layer for covering at least a portion of a side surface of the thin film transistor.

Liquid crystal display device with side light shielding layers and method for producing the same

The active matrix substrate of the invention includes: a storage capacitor formed on a board; a first insulating layer formed on the storage capacitor; a semiconductor layer formed above the storage capacitor via the first insulating layer: a gate insulating layer formed on the semiconductor layer; a gate electrode layer including a gate electrode formed above the semiconductor layer via the gate insulating layer; a second insulating layer covering the gate electrode layer and the semiconductor layer; a first light-shielding layer formed above the semiconductor layer via the second insulating layer to cover at least a channel region of the semiconductor layer; a third insulating layer formed on the first light-shielding layer; a source electrode layer including source and drain electrodes formed on the third insulating layer; a fourth insulating layer formed on the source electrode layer; and a pixel electrode formed on the fourth insulating layer and electrically connected to the drain electrode. The first light-shielding layer is conductive and has a drain-side light-shielding portion electrically connected to one of a pair of electrodes of the storage capacitor and also to the drain electrode.

Active matrix substrate and display device

The invention involves: the forming of a dummy pattern for planarization between convex portions (for example, between lead electrodes and a signal wire pattern) of irregularities caused by a patterned layer on a surface on which at least one interlayer insulating film is formed, so as to be separated by a predetermined distance from the convex portions; the forming of interlayer insulating filmsso as to fill up gaps between the dummy pattern and the convex portions; and the planarizing of a surface. Thereby, the invention is capable of relaxing requirements on uniformity in the thickness of the film to be polished and the thickness of the polished portion.

Substrate with a flattening film, display substrate, and method of manufacturing the substrates

A thin-film transistor includes: a pair of n-type heavily doped regions that are horizontally spaced apart from each other; p-type channel regions that are located between the n-type heavily doped regions so as to face their associated gate electrodes, respectively; an n-type intermediate region provided between two adjacent ones of the channel regions; and two pairs of lightly doped regions. The lightly doped regions in one of the two pairs have mutually different carrier concentrations and are located between one of the heavily doped regions and one of the channel regions that is closer to the heavily doped region than any other channel region is. The lightly doped regions in the other pair also have mutually different carrier concentrations and are located between the other heavily doped region and another one of the channel regions that is closer to the heavily doped region than any other channel region is.

Thin-film transistor, method for fabricating the same, and liquid crystal display device

In a transmission type liquid crystal display device, a semiconductor thin film is formed for each pixel below a signal wiring, a gate wiring, an auxiliary capacitance wiring and a lead electrode which are made of a light shading material via an insulating film. A region that belongs to the semiconductor thin film and is located below the signal wiring and below the gate wiring is made to serve as a channel region of a TFT. Regions that belong to the semiconductor thin film and are located on both sides of the channel region below the signal wiring are made to serve as a source region and a drain region of the TFT, respectively. Further, a region that belongs to the semiconductor thin film and is located below the auxiliary capacitance wiring is made to serve as an auxiliary capacitance electrode region. The TFT is effectively shaded without impairing the opening ratio of the transmission type liquid crystal display device with a simple construction, and the transmission type liquid crystal display device is fabricated with a high yield at low cost through a short process.

Transmission type liquid crystal display device

An a-Si film is formed on the whole surface of a quartz substrate , and a protection film is formed in a region to be used as a display unit on the a-Si film . Subsequently, after a catalyst metal is selectively introduced into the whole surface of a region to be used as a peripheral drive circuit on the a-Si film , crystal growth is allowed by heating the a-Si film to form a CG silicon film and a p-Si film . Then, the catalyst metal in the CG silicon film and the p-Si film is removed by gettering. The concentration of the catalyst metal in the CG silicon film is in the range of 1&times;10 atoms/cm or higher and lower than 1&times;10 atoms/cm . The concentration of the catalyst metal in the p-Si film for a display unit is made lower than the concentration of the catalyst metal in the CG silicon film for a peripheral drive circuit. Thereby, a semiconductor device having a driver monolithic type liquid crystal display device with high intensity, high precision and uniform characteristics can be achieved.

Active matrix display device having high intensity and high precision and manufacturing method thereof

A liquid crystal display device provided with an insulating substrate, a thin film transistor formed on the insulating substrate, and a pixel electrode and a storage capacitor electrically connected to the thin film transistor, includes a first conductive layer formed on the insulating substrate; a first insulating layer formed on the first conductive layer and having an opening for exposing a part of the first conductive layer; a second conductive layer formed on the first conductive layer at least within the opening; a second insulating layer for covering the second conductive layer; and a third conductive layer for covering the second insulating layer at least within the opening, and the storage capacitor is formed from a stacked layer structure including the second conductive layer, the second insulating layer and the third conductive layer.

Liquid crystal display device with capacitor in contact hole, and fabrication method for the same

A nanometer-size quantum thin line is formed on a semiconductor substrate of a Si substrate or the like by means of the general film forming technique, lithographic technique and etching technique. By opportunely using the conventional film forming technique, photolithographic technique and etching technique, a second oxide film that extends in the perpendicular direction is formed on an Si substrate. Then, by removing the second oxide film that extends in the perpendicular direction, a second nitride film located below the film and a first oxide film located below the film by etching, a groove for exposing the Si substrate is formed. Then, a Si thin line is made to epitaxially grow on the exposed portion of the Si substrate. The quantum thin line is thus formed without using any special fine processing technique. The width of the groove can be accurately controlled in nanometers by controlling the film thickness of the second oxide film that is formed by oxidizing the surface of the second nitride film.

Quantum thin line producing method and semiconductor device

An amorphous silicon film is deposited on a quartz substrate, and a metal of Ni is introduced into the amorphous silicon film so that the amorphous silicon film is crystallized. Phosphorus is ion-implanted with an oxide pattern used as a mask. A heating process is performed in a nitrogen atmosphere, by which Ni is gettered. A heating process is performed in an O atmosphere, by which Ni is gettered into the oxide. Like this, by performing the first gettering in a non-oxidative atmosphere, the Ni concentration can be reduced to such a level that oxidation does not cause any increase of irregularities or occurrence of pinholes. Thus, in a second gettering, enough oxidation can be effected without minding any increase of irregularities and occurrence of pinholes, so that the Ni concentration can be reduced to an extremely low level. Also, a high-quality crystalline silicon film free from surface irregularities and pinholes can be obtained.

Method for fabricating semiconductor device with high quality crystalline silicon film

There is provided a microstructure producing method capable of achieving satisfactory uniformity and reproducibility of the growth position, size and density of a minute particle or thin line and materializing a semiconductor device which can reduce the cost through simple processes without using any special microfabrication technique and has superior characteristics appropriate for mass-production with high yield and high productivity as well as a semiconductor device employing the microstructure. An oxide film,having a region,of a great film thickness and a region,of a small film thickness are formed on the surface of a semiconductor substrate,. Next, a microstructure that is a thin line,made of silicon Si is selectively formed only on the surface of the small-film-thickness region,of the oxide film

Microstructure producing method capable of controlling growth position of minute particle or thin and semiconductor device employing the microstructure

There is provided is a semiconductor storage device that can reduce a dispersion in characteristics such as a threshold voltage and a writing performance and has a low consumption power and a non-volatility. There are included a source region,and a drain region,formed on a silicon substrate,, a channel region,located between the source and drain regions,and,, a gate electrode,that is formed above the channel region,and controls a channel current flowing through the channel region,, and a control gate insulating film,, a floating gate,and a tunnel insulating film,that are arranged in order from the gate electrode,side between the channel region,and the gate electrode,. The floating gate,is comprised of a plurality of crystal grains,linearly discretely arranged substantially parallel to the surface of the channel region

Semiconductor storage device capable of improving controllability of density and size of floating gate

A quantum dot and quantum fine wire forming method is provided which can allow control of the position for crystalline particle growth and enables formation of particles with high uniformity in size and density and with high reproducibility. After an Si substrate is formed with a step by a dry etching method, an SiO.sub.2 film is formed on the surface of the substrate. The interior of a reaction chamber is evacuated to a vacuum of 10.sup.-8 Torr, and then an Si.sub.2 H.sub.6 gas is introduced into the reaction chamber to flow therein so that Si crystal particles (quantum dots) are formed along the step. The step is formed by conventional photolithography and dry etching; therefore, the position for quantum dot growth can be easily controlled. By controlling the rate and time period of gas flow and the temperature of the substrate it is possible to form quantum fine wires, and to control the size of quantum dots and/or thickness of quantum fine wires. In this way, high uniformity in quantum dot and/or quantum fine wire size/thickness and density can be realized with high reproducibility. Further, low cost production, high yield, and high productivity can be achieved without use of any special fine processing technique.

Method for forming ultrafine particles and/or ultrafine wire, and

There are provided a method for fabricating semiconductor nanocrystals which are highly controllable and less variable in density and size, as well as a semiconductor memory device which, with the use of the semiconductor nanocrystals, allows thickness of a insulating film between nanocrystals and channel region to be easily controlled and involves less variations in characteristics such as threshold and programming performance, and which is fast reprogrammable and has nonvolatility. Under a low pressure below atmospheric pressure, an amorphous silicon thin film 3 is deposited on a tunnel insulating film 2 formed on a silicon substrate 1. After the deposition of the amorphous silicon thin film 3, the amorphous silicon thin film 3 is heat treated at a temperature not lower than the deposition temperature of the amorphous silicon thin film 3 in an atmosphere of helium gas having no oxidizability, by which a plurality of spherical nanocrystals 4 with a diameter of 18 nm or less are formed on the tunnel insulating film 2 so as to be spaced from one another. The plurality of nanocrystals 4 are used as the floating gate of a semiconductor memory device.

Method for fabricating semiconductor nanocrystal and semiconductor

A semiconductor storage element has a source region, a drain region, and a channel region connecting the source region with the drain region, which each are formed on an insulation film of a substrate. A gate insulation film is formed between the channel region and a gate electrode. The source region, the drain region, and the channel region consist of an aggregate of spherical grains which are arranged two-dimensionally on the insulation film and connected with one another such that the adjacent spherical grains are conductive to one another. The channel region contains at least one carrier trap region provided at a location other than an electric path thereof.

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Fukuyama, Japan

Tohru Ueda