Fab Solutions, Inc.

Nec Corporation

Nippon Electric Co., Ltd.

Topcon Corporation

Tohru Tsujide

Keizo Yamada

Takeo Ushiki

Yousuke Itagaki

Yohsuke Itagaki

Kazuo Nakaizumi

Toyokazu Nakamura

Yasuko Hanagama

Kiyoshi Nikawa

Isao Sasaki

Masaaki Sugimoto

Makoto Miyazawa

Hiroyuki Hamada

Noboru Hirakawa

Hiroshi Ishioka

Toshiyasu Hishii

Masayuki Yojima

Kenji Morohashi

Nobuaki Hotta

A semiconductor wafer is radiated with an electron beam so that the inelastic scattering takes place in the narrow region, and current flows out from the narrow region; the amount of current is dependent on the substance or substances in the narrow region so that the analyst evaluates the degree of contamination on the basis of the substance or substances specified in the narrow region.

Surface contamination analyzer for semiconductor wafers

Surface contamination analyzer for semiconductor wafers, method used therein and process for fabricating semiconductor device

A system and method is disclosed for obtaining information regarding one or more contact and/or via holes on a semiconductor wafer. In one embodiment, the method obtains information regarding one or more holes (for example, via or contact) that are disposed in a semiconductor wafer or disposed in a layer which is disposed on or above the semiconductor wafer. The method of this embodiment comprises irradiating the one or more holes with an electron beam; and determining information relating to a bottom diameter or a bottom circumference of the one or more holes using data which is representative of an amount of substrate current which is generated in response to irradiating the one or more holes with an electron beam.

Semiconductor device tester

A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devices-for producing semiconductor devices, in-line measuring devices-for measuring data of a lot, a databasestoring data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a serverincluding an estimated yield operating unitfor calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unitfor performing a production management of semiconductor devices ordered by a user on the basis of the respective data inputted by the user and the estimated yield, wherein a user terminal of the user not only performs a determination whether or not the process processing in every process is normal but also estimates the final number of normal products ordered by the user and obtainable finally.

Production managing system of semiconductor device

In one aspect, the present invention is a system and method for obtaining information regarding one or more contact holes and/or vias on a semiconductor wafer. In this regard, in one embodiment, the system comprises an electron gun to irradiate an electron beam, having a variable acceleration voltage, on the one or more contact holes and/or vias. The system further includes a current measuring device, coupled to the semiconductor wafer, may measure a compensation current, wherein the compensation current is generated in response to the electron beam irradiated at a plurality of acceleration voltages on the one or more contact holes. The system also includes a data processor, coupled to the current measuring device, to determine information relating to the one or more contact holes and/or vias using the compensation current measured for the plurality of acceleration voltages of the electron beam.

In one aspect, the present invention is a system and method for obtaining information regarding one or more contact holes and/or vias on a semiconductor wafer. In this regard, in one embodiment, the system comprises an electron gun to irradiate an electron beam on the one or more contact holes and/or vias wherein the electron beam includes a cross-section which is greater than the one or more contact holes. The system further includes a current measuring device, coupled to the semiconductor wafer, may measure a compensation current, wherein the compensation current is generated in response to the electron beam irradiated on the one or more contact holes. The system also includes a data processor, coupled to the current measuring device, to determine information relating to the one or more contact holes and/or vias using the compensation current.

A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devicesfor producing semiconductor devices, in-line measuring devicesfor measuring data of a lot, a databasestoring data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a serverincluding an estimated yield operating unitfor calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unitfor performing a production management of semiconductor devices ordered by a user on the basis of the respective data inputted by the user and the estimated yield, wherein a user terminal of the user not only performs a determination whether or not the process processing in every process is normal but also estimates the final number of normal products ordered by the user and obtainable finally.

Current produced in a sample by irradiating the sample with parallel electron beam is measured by an ammeter . The measurement is repeated while changing acceleration voltage of electron beam . An information related to a structure of the sample in a depth direction thereof is obtained by a data processor , on the basis or a difference in transmittivity of electron beam into the sample due to the difference of acceleration voltage.

Semiconductor device tester which measures information related to a structure of a sample in a depth direction

A production managing system for semiconductor devices includes, in a semiconductor producing center C, production devices for producing semiconductor devices, in-line measuring devices for measuring data of a lot, a database storing data of production methods, the measured data, the specifications of the process steps corresponding to the measured data, the estimated yield, the data of lot input date and hour, the data of the scheduled date on which the process step is performed, the data of actual date of completion in every step and the data of the scheduled date of completion of the semiconductor devices of every lot, correspondingly to a lot number data of the semiconductor devices (chips) and a server including an estimated yield operating unit for calculating the estimated yield, which is a final yield, on the basis of the specifications and the measured data, and a production managing unit for performing a production management of semiconductor devices ordered by a user on the basis of the respective data inputted by the user and the estimated yield, wherein a user terminal of the user not only performs a determination whether or not the process processing in every process is normal but also estimates the final number of normal products ordered by the user and obtainable finally.

A semiconductor device inspecting apparatus capable of a high-precision nondestructive inspection with a reduction of external noises, by using a value of an area having no hole as a background value for a correction when measuring an average current, measuring the current in a current differential input amplifier constitution, automatically judging whether a result of the measurement is caused by a defect of the device or of the equipment on the basis of a measured current waveform, measuring a current value of electron beams, and storing and reusing a waiting time between irradiation with electron beams and stabilization of the current measurement value.

Semiconductor device inspecting apparatus

A plurality of measuring positions on a sample are sequentially irradiated with electron beams having identical cross sectional shapes, currents produced in the sample when the individual measuring positions are irradiated with electron beams are measured and the measured currents or physical amounts derived from the measured currents are displayed on a two-dimensional plane as a function of measuring position.

Semiconductor device tester and semiconductor device test method

The present invention provides a semiconductor wafer tester including a substrate, at least one chip mounted on an upper surface of the substrate, the chip having function as a tester, the chip being electrically connected to a contact formed on a lower surface of the substrate through an internal wiring formed in the substrate, and a contact film having at least one first bump formed on an upper surface thereof and at least one second bump formed on a lower surface thereof, the first bump being electrically connected to the second bump through an internal wiring formed throughout the contact film, the contact film being to be disposed to be sandwiched between the substrate and a semiconductor wafer to be tested so that the first bump is in electrical contact with the contact of the substrate and the second bump is in electrical contact with the semiconductor wafer. The tester makes it possible to carry out high frequency test concurrently for a plurality of semiconductor wafers in a shorter period of time with lower costs.

Apparatus for testing semiconductor wafer

In a fault analysis of large-scale integrated (LSI) circuits, a potential distribution image of a non-defective product and another potential distribution image of a defective product are displayed alternately and continuously in time, so that it is possible to acquire in real time an image of any location within a whole surface of the LSI chip. As a result, it can be viewed as if the potential distribution image of the non-defective product and the potential distribution image of the defective product are overlapped or superimposed with over time. Accordingly, a different portion between the non-defective and defective potential distribution images can be seen distinguishably from a coincident portion between the non-defective and defective potential distribution images, so that it is possible to trace the different portion in real time.

Growing community of inventors

Tokyo, Japan

Tohru Tsujide