Life Technologies Corporation

Hyperfine Research, Inc.

Quantum-si Incorporated

Hyperfine Operations, Inc.

Hyperfine, Inc.

Hyperfire Research, Inc.

Todd Rearick

Jonathan Marc Rothberg

Jeremy Christopher Jordan

Michael Stephen Poole

Gregory L Charvat

Hadrien A Dyvorne

Laura Sacolick

William Julian Mileski

Keith Glen Fife

Christopher Thomas McNulty

Cedric Hugon

Alan B Katze, Jr

Matthew Scot Rosen

Eric A G Webster

Farshid Ghasemi

Jonathan M Schultz

Dajiang Yang

Mark James Milgrew

Jonathan C Schultz

Gerard M Schmid

Ali Kabiri

Paul E Glenn

Benjamin Cipriany

James M Bustillo

Jack L Jewell

Kim L Johnson

Lawrence Camest West

Jason W Sickler

David Marran

Kyle Preston

Xin Ru Wang

John R Nobile

Wolfgang Hinz

Jeremy Lackey

Brian Reed

James A Ball

David Light

Earl A Hubbell

Todd Roswech

John F Davidson

Faisal R Ahmad

Changhoon Choi

Mark Beauchemin

Jose Camara

John Glenn

Xin Wang

Thomas Raymond Thurston

Melville Davey

John Donohue

Chiu Tai Andrew Wong

Joseph D Clark

Peter J Lim

Zhaoyu He

Chris Papalias

Simon Cawley

Charles Sugnet

Guojun Chen

Chun Heen Ho

Alexander Goryaynov

Eric Ag Webster

Iztok Marjanovic

Mohit Gupta

Tom Thurston

Brett J Gyarfas

Devin Dressman

Michael Ferrigno

Peter M Levine

John Andrew Sheridan

Jonathan M Rothberg

George Roth

Martin Huber

Mel Davey

Brittany Lathrop

Thomas Roth

Nicholas Hapshe

Jason Gioia

Jessica Lynn Reed

Daniel B Frier

Thomas Connolly

Antoine M Van Oijen

Louie Ho

Johnathan Rothberg

Described herein are techniques to reduce or remove the impact of secondary path photons and/or charge carriers on storage bins of an integrated device to improve noise performance, and thus, sample analysis. Some embodiments relate to optical rejection techniques such as including an optical barrier positioned to block at least some photons from reaching the storage bins. Some embodiments relate to electrical rejection techniques such as including an electrical barrier configured to block at least some charge carriers from reaching the storage bins along at least one secondary path. Some embodiments relate to an integrated device in which at least one storage bin is shaped and/or positioned relative to the photodetector to facilitate receipt of some charge carriers (e.g., fluorescent emission charge carriers) and/or photons and to impede receipt of other charge carriers (e.g., noise charge carriers) and/or photons.

Optical and electrical secondary path rejection

An apparatus includes a reaction vessels coupled to an electronic sensor for monitoring a reaction product in the reaction vessel; a fluidics system for sequentially delivering a plurality of reagents to the reaction vessel, the fluidics system including a plurality of reagent reservoirs in fluidic communication via a plurality of flow paths with a fluidics circuit and to a common passage in fluidic communication between the fluidics circuit and the reaction vessel, a solution reservoir in fluidic communication with the common passage via a branch passage connected with the common passage at a junction between the fluidics circuit and the reaction vessel; and an electrode in contact with a solution within the branch passage, the electrode being in electrical communication with the reaction vessel through fluid extending from the branch passage and through the common passage, the electronic sensor generating an output signal depending on a voltage of the electrode.

Apparatus and methods for performing electrochemical reactions

Aspects relate to providing radio frequency components responsive to magnetic resonance signals. According to some aspects, a radio frequency component comprises at least one coil having a conductor arranged in a plurality of turns oriented about a region of interest to respond to corresponding magnetic resonant signal components. According to some aspects, the radio frequency component comprises a plurality of coils oriented to respond to corresponding magnetic resonant signal components. According to some aspects, an optimization is used to determine a configuration for at least one radio frequency coil.

Radio frequency coil methods and apparatus

Methods and apparatus for reducing noise in RF signal chain circuitry for a low-field magnetic resonance imaging system are provided. A switching circuit in the RF signal chain circuitry may include at least one field effect transistor (FET) configured to operate as an RF switch at an operating frequency of less than 10 MHz. A decoupling circuit may include tuning circuitry coupled across inputs of an amplifier and active feedback circuitry coupled between an output of the amplifier and an input of the amplifier, wherein the active feedback circuitry includes a feedback capacitor configured to reduce a quality factor of an RF coil coupled to the amplifier.

Radio-frequency coil signal chain for a low-field MRI system

Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some aspects, an integrated circuit described herein may include a first pixel and a second pixel, wherein the first pixel is proximate the second pixel in a mirrored configuration. In some aspects, an integrated circuit described herein may include a first pixel and a second pixel that is proximate to the first pixel along a row direction, and a conductive line extending along a column direction that intersects with the row direction, wherein the conductive line is in electrical communication with a first component of the first pixel and a second component of the second pixel.

Integrated circuit having mirrored pixel configuration

Aspects of the technology described herein relate to improved semiconductor-based image sensor designs. In some embodiments, an integrated circuit may comprise a photodetection region and a drain region electrically coupled to the photodetection region, and the photodetection region may be configured to induce an intrinsic electric field in a direction from the photodetection region to the drain region(s). In some embodiments, a charge storage region and the drain region may be positioned on a same side of the photodetection region. In some embodiments, at least one drain layer may be configured to receive incident photons and/or charge carriers via the photodetection region. In some embodiments, an integrated circuit may comprise a plurality of pixels and a control circuit configured to control a transfer of charge carriers in the plurality of pixels.

Integrated sensor for lifetime characterization

Some aspects relate to integrated devices for obtaining timing and/or spectral information from incident light. In some embodiments, a pixel may include one or more charge storage regions configured to receive charge carriers generated responsive to incident photons from a light source, with charge carriers stored in the charge storage region(s) indicative of spectral and timing information. In some embodiments, a pixel may include regions having different depths, each configured to generate charge carriers responsive to incident photons. In some embodiments, a pixel may include multiple charge storage regions having different depths, and one or more of the charge storage regions may be configured to receive the incident photons and generate charge carriers therein. In some embodiments, a pixel may include an optical sorting element configured to direct at least some incident photons to one charge storage region and other incident photons to another charge storage region.

Sensor for lifetime plus spectral characterization

Aspects of the present disclosure relate to techniques for reducing skew in an integrated device, such as a CMOS imaging device. In some aspects, multiple pixels of an integrated circuit may be configured to receive a same control signal and conduct charge carriers responsive to the control signal substantially at the same time. In some aspects, an integrated circuit may have modulated charge transfer channel voltage thresholds, such as by having different charge transfer channel lengths, and/or a doped portion configured to set a voltage threshold for charge transfer. In some aspects, an integrated circuit may have a via structure having a plurality of vias extending between continuous portions of at least two metal layers. In some aspects, an integrated circuit may include a row of pixels and a voltage source configured to provide a voltage to bias a semiconductor substrate of the integrated circuit along the row of pixels.

Integrated sensor with reduced skew

Described herein are techniques that improve the collection and readout of charge carriers in an integrated circuit. Some aspects of the present disclosure relate to integrated circuits having pixels with a plurality of charge storage regions. Some aspects of the present disclosure relate to integrated circuits configured to substantially simultaneously collect and read out charge carriers, at least in part. Some aspects of the present disclosure relate to integrated circuits having a plurality of pixels configured to transfer charge carriers between charge storage regions within each pixel substantially at the same time. Some aspects of the present disclosure relate to integrated circuits having three or more sequentially coupled charge storage regions. Some aspects of the present disclosure relate to integrated circuits capable of increased charge transfer rates. Some aspects of the present disclosure relate to techniques for manufacturing and operating integrated circuits according to the other techniques described herein.

Integrated circuit with sequentially-coupled charge storage and associated techniques

In some aspects, a method of operating a magnetic resonance imaging system comprising a Bmagnet and at least one thermal management component configured to transfer heat away from the Bmagnet during operation is provided. The method comprises providing operating power to the Bmagnet, monitoring a temperature of the Bmagnet to determine a current temperature of the Bmagnet, and operating the at least one thermal management component at less than operational capacity in response to an occurrence of at least one event.

Automatic configuration of a low field magnetic resonance imaging system

Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from within a semiconductor region of the pixel outside of the photodetection region. Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from the photodetection region, wherein the drain comprises a semiconductor region and the semiconductor region is contacted by a metal contact. Some embodiments relate to an integrated circuit, comprising: a pixel, comprising: a photodetection region; and a drain configured to discard charge carriers from the photodetection region, wherein the drain comprises a semiconductor region that to which electrical contact is made through a conductive path that does not include a polysilicon electrode.

Pixel with enhanced drain

An integrated circuit includes a photodetection region configured to receive incident photons. The photodetection region is configured to produce a plurality of charge carriers in response to the incident photons. The integrated circuit includes a charge carrier storage region. The integrated circuit also includes a charge carrier segregation structure configured to selectively direct charge carriers of the plurality of charge carriers directly into the at least one charge carrier storage region based upon times at which the charge carriers are produced.

Integrated photodetector with charge storage bin of varied detection time

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Cheshire, CT, United States of America

Todd Rearick