International Business Machines Corporation

Globalfoundries Inc.

Todd Edward Takken

Paul William Coteus

Xin Zhang

Alan G Gara

Shurong Tian

Philip Heidelberger

Dong Chen

Matthias Augustin Blumrich

Andrew Ferencz

Mark Edwin Giampapa

Shawn Anthony Hall

Yuan Yao

Burkhard D Steinmacher-Burow

Pavlos Michael Vranas

Mark Delorman Schultz

Gerard Vincent Kopcsay

Martin Ohmacht

Dirk Hoenicke

Valentina Salapura

Michele M Franceschini

Thomas Mario Cipolla

Blake G Fitch

George L Chiu

Robert Matthew Senger

Burkhard Steinmacher-Burow

Dong Chen Chen

Noel A Eisley

Rudolf Adriaan Haring

Yutaka Sugawara

Daniel Christopher Worledge

Ko-Tao Lee

Leland Chang

Fuad Elias Doany

Lawrence Shungwei Mok

Thomas M Gooding

Mark Gregory Megerian

Barry Marshall Trager

James Anthony Marcella

Krishnan Sugavanam

Ralph E Bellofatto

Michael K Gschwind

Warren Edward Maule

Daniel Mark Dreps

Michael A Blocksome

Kyu-hyoun Kim

Joseph D Ratterman

Adam James Muff

Ashish Jagmohan

Naigang Wang

Joshua M Rubin

Bruce Martin Fleischer

Alexandre E Eichenberger

Robert William Wisniewski

John A Gunnels

Kathryn Mary O'Brien

Sameh W Asaad

Charles Arthur Kilmer

Thomas Winters Fox

John Kevin O'Brien

Chen-Yong Cher

Peng Wu

Charles David Wait

Sameer Kumar

Todd Alan Inglett

Jeffrey John Parker

Craig Brian Stunkel

Douglas R Miller

David L Satterfield

Amith R Mamidala

Kristan D Davis

Jose R Brunheroto

Michael B Mundy

Matthew Roger Ellavsky

Robert E Walkup

James Lee Van Oosten

Samuel J Miller

Gabor J Dozsa

Ruth Janine Poole

Brant L Knudson

Peter Boyle

Timothy Joseph Chainer

Brian E Smith

Arvind Kumar

Robert K Montoye

Frank David Ferraiolo

John Kenneth DeBrosse

Hillery C Hunter

Yutaka Nakamura

Jeffrey Haskell Derby

Mark James Jeanson

Douglas James Joseph

William Thomas Flynn

Shmuel Winograd

Wayne Melvin Barrett

Paul Gregory Crumley

Gheorghe Almasi

Don Darrell Reed

Richard A Swetz

Gyan Vatsaraja Bhanot

Martin Cochet

A circuit board including: a first board material layer having a first planar surface and a first sidewall surface perpendicular to the first planar surface; a first conductive layer on the first planar surface; a second board material layer stacked on the first board material layer and having a second planar surface and a second sidewall surface perpendicular to the second planar surface; a second conductive layer on the second planar surface; and a plating on the first sidewall surface and the second sidewall surface and electrically connecting the first conductive layer and the second conductive layer.

Sidewall plating of circuit boards for layer transition connections

An exemplary apparatus includes a substrate; a plurality of chips mounted onto the substrate; a plurality of cold plates corresponding to the plurality of chips; means for pressing each of the cold plates toward a corresponding one of the chips; means for delivering coolant flow to the cold plates; and means for adjusting the cooling power of the plurality of cold plates, responsive to at least one sensed parameter of the plurality of chips.

Heterogeneous integrated multi-chip cooler module

An apparatus includes a cabinet; an air-mover attached to the cabinet; a circuit board mounted in the cabinet; and an air-cooled heat sink attached in thermal contact with a heat-generating component on the circuit board. The heat sink includes a heat sink base; primary heat removal fins protruding from the heat sink base in a direction away from the circuit board; and secondary heat removal fins protruding from the heat sink base in a direction toward the circuit board. The air-mover is configured to force air between the primary heat removal fins and between the secondary heat removal fins.

Heat sinks with beyond-board fins

An approach for reducing unwanted magnetic coupling with conductive elements by keeping the localized magnetic field in a transformer's or inductors magnetic gap far away from any conductive elements is provided. The approach includes the use of spacers to keep the localized magnetic field in a transformer's or inductor's magnetic gap far away from any conductive elements to reduce unwanted magnetic coupling with those conductive elements. The spacers can be made from materials including ferrite, conductors and non-conducting elements.

Spacer to reduce magnetic coupling

A semiconductor package provides a low profile connection to a bottom side of the semi-conductor package. The semi-conductor package includes a computer processor die and a substrate. The computer processor die is mounted on to a top surface of the substrate. The substrate is mounted on to a printed circuit board. A voltage regulator is coupled to the printed circuit board. A top surface of the voltage regulator is coupled to a bottom surface of the substrate. The package also includes a connector device. The connector device includes a cable configured to conduct power from an upstream source, and a low-profile connector module attached to an end of the cable. The connector module is configured to interface to a bottom surface of the voltage regulator.

Separable interface cable structure for high voltage under-module power input

A broadside coupled coplanar inductor device includes first and second coplanar inductors in which the conductors of the first and second coplanar inductors are broadside coupled. The conductors are located one above the other at a first distance and the return paths are located to the side of the respective first and second conductor signal paths at a second distance. One or both of the dimensions of the first and second first distances is defined so as to maximize a mutual inductance between the conductors. First and second driver circuit apply voltages across each conductor. The input pulse width modulation signals applied to the first and second driver circuits are 180 degrees out of phase.

Broadside coupled coplanar inductors

A power converter with co-packaged secondary field effect transistors (FETs) are described. The power converter can include a first circuit, a transformer connected to an output of the first circuit, and a second circuit connected to an output of the transformer. The second circuit can include an inductor, a first FET coupled between the transformer and the inductor, and a second FET coupled between the first FET and ground. The first FET and the second FET can be co-packaged as a single package.

Power converter with co-packaged secondary field effect transistors (FETs)

A package structure is disclosed. The package structure includes processor die connected to a top surface of a package substrate. The package structure further includes a DC-DC power converter attached to a bottom surface of the package substrate. The DC-DC power converter is located at least within an open area of an interconnect component that connects the bottom surface of the package substrate and a top surface of a motherboard.

Vertical power delivery packaging structure

A server drawer comprising a plurality of Printed Circuit Boards (PCBs) respectively containing heat-generating electronic devices. The server drawer further comprises a plurality of fans configured to convectively dissipate heat from the heat-generating electronic devices. The server drawer further comprises internal partitions isolating airflow between respective PCBs of the plurality of PCBs.

Dedicated airflow channels for cooling server drawers

An apparatus comprising chips mounted to a substrate, wherein one or more of the chips comprises a first height and one or more of the chips comprises a second height, wherein the first height is taller than the second height. A cold plate located above the plurality of chips, wherein the cold plate includes a bottom wall and a top wall, wherein the cold plate includes a plurality of cooling fins that are attached to the bottom wall of the cold plate, wherein the cold plate accommodates the plurality of chips, wherein the chips includes chips having the first height and the second height.

Flexible cold plate for contacting varied and variable chip heights

A structure is provided for a structure for providing electrical connections across a connection interface is provided. The structure may include one or more signal connections, a plurality of reference connections, and one or more high-pass filters. One or more of the reference connections is configured to connect a first reference voltage in a first region on a first side of the interface with a second reference voltage in a second region on a second side of the interface. One or more of the reference connections in a first class of reference connections is coupled one or more of the reference voltages through the one or more high-pass filters, and low-bandwidth information is communicated across the one or more reference connections in the first class of reference connection.

Daughter card plug detection

A system and method for supporting an interconnection of processor cores, each core with functional state monitors for monitoring operations of each processor core, the processor cores interconnected using a resistive network connected between two-terminal regions being embedded in the resistive network such that each terminal of a region may be connected by controllable resistors to one or both fixed rails or by controllable resistors to one or more intermediate nodes. The resistor values are configurable to provide indirect control of the voltages across each two-terminal region, allowing full dynamic control of voltages of the two-terminal regions in a range up to the full voltage between the two voltage rails, and where a management unit accesses the functional state monitors and controls the resistor values. Feedback from functional state monitors allow the operating frequency to extend down to arbitrarily low values and up to the limits imposed by the technology.

Stacked, reconfigurable co-regulation of processing units for ultra-wide DVFS

A method includes attaching an integrated circuit chip module substrate to a printed circuit board (PCB). First region(s) of a bottom surface of the module include electrical contacts to the board, and second region(s) of the bottom surface of the module lack such contacts. Mechanical structures are assembled into the second regions. These structures allow lateral motion of the module relative to the board, and are sized and placed to inhibit bending of the second regions of the module towards the board under application of a vertical force on a top surface of the module. A package for an integrated circuit may be assembled using the method.

Flex prevention mechanical structure such as a ring for large integrated circuit modules and packages and methods of manufacture using same

In an apparatus for coupling integrated circuits to printed circuit boards, a backing plate with manufactured features on the top surface includes a module lid; a planar structure; a device seated in the planar structure, with the module lid in contact with the top surface of the device; and a backing plate that contains manufactured features on one side. The backing plate is in contact with the planar structure, and a plurality of fastening mechanisms couple together the lid, the device, the planar structure, and the backing plate.

Backing plate with manufactured features on top surface

Embodiment of the present invention includes a magnetic structure and a magnetic structure used in a direct current (DC) to DC energy converter. The magnetic structure has an E-core and a plate, with the plate positioned in contact or in near contact with the post surfaces of the E-core. The E-core has a base, a no-winding leg, a transformer leg, and an inductor leg. The no-winding leg, the transformer leg, and the inductor leg are perpendicular and magnetically in contact with the base. The plate is a flat slab with lateral dimensions generally larger than its thickness. The plate has a plate nose that overlaps a top no-winding leg surface of the no-winding leg with a no-winding gap area to form a no-winding gap with a no-winding gap reluctance. The plate also has a plate end that overlaps a top inductor leg surface of the inductor leg with an inductor gap area to form an inductor gap with an inductor gap reluctance. In some embodiments, e.g., where the duty cycle is less than 50 percent, the inductor gap reluctance will be designed to be less than the no-winding gap reluctance. In these cases, the majority of the magnetic flux that passes through the transformer leg will return through the inductor leg, instead of through the no-winding leg. The inductor and no-winding gap reluctances can he adjusted, so that the electromotive force applied to a charge passing through the inductor will partially cancel the electromotive force applied by the transformer secondary. The gap reluctance ratio can be defined, so that the difference in secondary and inductor electromotive forces is equal to the output voltage defined by an optimal no-ripple duty cycle. In this way no changing current is required through the inductor to create a dI/dt inductive voltage drop across the output inductor. Zero output current ripple is achieved. Various embodiments of the plate, plate shape, and no-winding leg are disclosed. These embodiments allow achieving a high ratio of no-winding gap reluctance to inductor gap reluctance, for practical, affordable magnetic material structures and aspect ratios. A high gap reluctance ratio enables zero output current ripple for the high transformer turns ratios that are needed to achieve high input to output voltage ratios. The embodiments therefore allow achieving low output current ripple for 48 V or higher input voltages, 1 V or lower output voltages, and high output currents.

Magnetic cores with high reluctance differences in flux paths

Growing community of inventors

Mt. Kisco, NY, United States of America

Todd Edward Takken