Intel Corporation

Semiconductor Components Industries, LLC

Analog Devices,inc.

Schmitt Measurement Systems, Inc.

Tod F Schiff

Chee Lim Nge

Alexander Uan-Zo-Li

Krishnakanth Venkata Sistla

Ankush Varma

Robert E Gough

Naoki Matsumura

Andrew D Henroid

Guy G Sotomayor

Vijayakumar Ashok Dibbad

Efraim Rotem

James G Hermerding, Ii

Jerry Zhijun Zhai

Richard Redl

Doron Rajwan

Alexander Gendler

Eugene Gorbatov

Nir Rosenzweig

Jorge Pedro Rodriguez

Gang Chen

Ramon C Cancel Olmo

Zhongsheng Wang

Soethiha Soe

Sapumal Wijeratne

Jun Zhao

Siva Ramakrishnan

Samantha Rao

John J Valavi

Philip R Lehwalder

Gabor Reizik

Brian Patrick Johnson

Muhammad Abozaed

Brian C Fritz

Alexander B Uan-Zo-li

Patrick K Leung

Alan Hallberg

Joseph C Buxton

Scot Lester

David Tobin

Xiaogang Feng

Marvin L Bernt

Nimrod Angel

Ameya Ambardekar

Peng Liu

Arunthathi Chandrabose

Mark E Southwood

Sanjiv Soman

Teal Hand

Jeffrey Jull

Robert Santucci

Michael J Harms

Jeffrey Schline

Maytal Toledano

Kean Pan

Doug Osterhout

Vikas Vij

Paul A Perrault

David I Hunter

Rodney J Goldhammer

Michael J Smith

Ivy Li

Brice Onken

Qiyong Brian Bian

Ling-shun Wong

Ming-Chia Lee

James G Ii Hermerding

Richard Elfi SA Redl

A workload dependent load-sharing mechanism in a multi-battery system. The mechanism is an energy management system that operates in three modes—energy saving mode, balancer mode, and turbo mode. The energy saving mode is a normal mode where the multiple batteries provide power to their own set of loads with least resistive dissipation. In balancing mode, the batteries are connected through switches operating in active mode so that the current shared is inversely proportion to the corresponding battery state-of-charge. In turbo mode, both batteries are connected in parallel through switches (e.g., on-switches) to provide maximum power to a processor or load. A controller optimizes the sequence and charging rate for a hybrid battery to maximize both the charging current and charging speed of the battery, while enabling longer battery life. The hybrid battery comprises a fast charging battery and a high-energy density battery.

Multi load and multi battery system with sharing apparatuses

Software and/or hardware to monitor system usage including how long system ran on a battery or with AC adapter power. The software and/or hardware judges whether fast charging is needed and/or how much charge is needed, and optimizes battery charging settings.

Context-based battery charging apparatus and method

Techniques are provided for operating a computing system in a peak power mode while avoiding increased degradation of a battery. The peak power mode include cycles with peak and off-peak currents. The amplitude and duration of the peak and off-peak currents are governed by a thermal/heat budget of the battery. A processor can read the battery information during usage and calculate one or more parameters which are derived from heat. If a parameter is smaller than a reference value, the processor can update the peak power parameters to provide an increase in peak current/power and/or duration. If a parameter is larger than the reference value, no heat budget is available to provide an increase in peak current/power and/or duration. The thermal/heat budget can be enforced over each cycle of the peak power mode or in a summation over multiple cycles.

Battery heat balancing apparatus and method during peak mode

In one embodiment, a processor includes a plurality of cores each including a first storage to store a physical identifier for the core and a second storage to store a logical identifier associated with the core; a plurality of thermal sensors to measure a temperature at a corresponding location of the processor; and a power controller including a dynamic core identifier logic to dynamically remap a first logical identifier associated with a first core to associate the first logical identifier with a second core, based at least in part on a temperature associated with the first core, the dynamic remapping to cause a first thread to be migrated from the first core to the second core transparently to an operating system. Other embodiments are described and claimed.

Dynamically updating logical identifiers of cores of a processor

Techniques and mechanisms for supplementing power delivery with a battery. In an embodiment, a voltage is provided at a first node with the battery to power a load circuit. A charger is coupled between the first node and a second node, wherein a capacitor is coupled to provide charge to the charger via the second node. In response to detecting a transition of the voltage below a threshold voltage level, controller logic operates switch circuitry of the charger to provide charge from the capacitor. Such operation maintains the voltage in a range of voltage levels which are each above a minimum voltage level required by the load. At least a portion of the range is below the threshold voltage level. In some embodiments, another voltage at the second node provides a basis for generating a control signal to throttle an operation of the load circuit.

Voltage minimum active protection circuit and method of operating same

A dedicated pin of a processor or system-on-chip (SoC) is used to indicate whether power level (e.g., charge, voltage, and/or current) of a battery falls below a threshold. The threshold can be predetermined or programmable. The battery is used to provide power to the processor and/or SoC. Upon determining that the power level of the battery falls below the threshold, the processor by-passes the conventional process of entering low performance or power mode, and directly throttles voltage and/or operating frequency of the processor. This allows the processor to continue to operate at low battery power. The fast transition (e.g., approximately 10 &#x3bc;S) from an active state to a low performance or power mode, in accordance with a logic level of the voltage on the dedicated pin, reduces decoupling capacitor design requirements, and makes it possible for the processor to adapt higher package power control settings (e.g., PL4).

Fast dynamic capacitance, frequency, and/or voltage throttling apparatus and method

Power monitoring circuitry is provided to monitor an input system power profile of processing tasks executing on a processing platform. An input is provided to receive from the processing platform, a processing system signal indicating a power being consumed by the processing platform. A counter is provided to store a count value corresponding to an accumulated number or amount of times that a warning threshold condition associated with a warning threshold value is satisfied by the received processing system signal in a count-accumulation time interval. The count value is supplied to a power control circuit of the processing platform via a bus in response to a read request from the power control circuit, the power control circuit being responsive to the count value to control a performance level of the processing platform.

Power monitoring for a processing platform

In some examples, a peak power system includes a plurality of system components, one or more of the system components to dynamically provide a peak power requirement of the component. The system also includes a peak power manager to receive the peak power requirement of the one or more of the system components. The peak power manager can also dynamically provide, based on a system peak power limit and based on at least one updated peak power requirement received from at least one of the one or more system components, an updated component peak power limit to one or more of the system components.

Power management and protection

A bi-directional charger may be provided that includes a logic, at least a portion of which is hardware, to determine an operational mode based at least on a characteristic at a battery port or at a charge port, and to control power flow between the charge port and the battery port based on the determined operational mode.

Bi-directional charger for battery device with control logic based on sensed voltage and device type

One embodiment provides an apparatus. The apparatus includes power control logic and a critical comparator. The power control logic is to determine a critical threshold (TC) based, at least in part, on an available input power value (Pin). The critical comparator is to compare a system power consumption value (Psys) and the critical threshold and to assert a processor critical throttle signal to a processor if the system power consumption value is greater than or equal to the critical threshold.

System power management

Some embodiments include apparatuses and methods having a node to couple to a serial bus, and a controller to provide a control signal to one of a first circuit path and a second circuit path in order to change electrical termination of a signal at the node between a first electrical termination through the first circuit path during a first mode of the controller and a second electrical termination through the second circuit path during a second mode of the controller. The controller can be arranged to provide the control signal to the first and second circuit paths during the first and second modes without providing another control signal from the controller to the first and second circuit paths during the first and second modes.

Serial bus electrical termination control

An electronic apparatus may include a charger device to obtain information relating to a first battery, and to set a limit of a battery charge current of a second battery based on the obtained information.

Power delivery system

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Portland, OR, United States of America

Tod F Schiff