Xilinx, Inc.

Toader-Adrian Chirila-Rus

Wilson Chung

Robert D Turney

Wael Badawy

Ihab Amer

A method and apparatus for an adaptive systolic array structure is initially configured for motion estimation calculations and optionally reconfigured as the motion estimation algorithm progresses. A scheduling map of the processing element (PE) calculations for a given motion estimation algorithm is generated. A systolic array structure may then be generated from the scheduling map, whereby the size and shape of a processing element array is configured to generate the search pattern that is to be used during the search. In addition, delay elements may be implemented within the systolic array structure, so as to preserve the pixels of a current macroblock that are reused in accordance with the scheduling map. The systolic array structure may also be adapted by the motion estimation algorithm during subsequent search stages to accommodate refinements required by the search strategy.

Method and apparatus for an adaptive systolic array structure

Determining a sum of absolute differences using a circuit is described. Pairs of inputs, including a respective current value and a respective previous value, are obtained. The previous value is subtracted from the current value for each of the pairs of inputs to provide differences and associated carries. Inverted carries are applied to the differences to pass a first portion of the differences associated with positive absolute differences and to invert and then pass a second portion of the differences associated with negative absolute differences. The inverted carries are summed. The first portion and the second portion are provided to an adder tree to generate an interim sum of absolute differences. The sum of inverted carries obtained over a number of clock cycles is added to the interim sum of absolute differences obtained over the number of clock cycles to generate a sum of absolute difference result.

Determining sum of absolute differences in parallel

A data structure and method of use thereof for encoding video information are described. Macroblock parameters are initialized, and it is determined whether an operating point is selected. If the operating point is selected, then the following occurs: each quad of nodes of a first node level are obtained and a check for merger is done on them; each quad of nodes of a second node level is obtained and a check for merger is done on them; nodes of a third node level are obtained and check for merger is done on them; nodes of a fourth node level are obtained and a check for merger is done on them; and modes are assigned responsive to cost of combinations of encoding modes associated with possible mergers.

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Toader-Adrian Chirila-Rus