Taiwan Semiconductor Manufacturing Comp. Ltd.

Ting-Yun Wu

Carlos H Diaz

Zhiqiang Wu

Wen-Hsing Hsieh

Tzer-Min Shen

Hua Feng Chen

Ya-Yun Cheng

Yen-Sen Wang

Bao-Ru Young

Chung-Yi Lin

Yen-Chun Lin

Hsiao-Wen Hsu

The present disclosure provides embodiments of semiconductor structures. A semiconductor structure according to the present disclosure includes a substrate, a fin-shaped structure disposed over the substrate, the fin-shaped structure including a plurality of first semiconductor layers interleaved by a plurality of second semiconductor layers, a gate structure disposed over a channel region of the fin-shaped structure, a first source/drain feature extending through at least a first portion the fin-shaped structure, a second source/drain feature extending through at least a second portion of the fin-shaped structure, and a backside metal line disposed below the substrate and spaced apart from the first source/drain feature and the second source/drain feature.

Electrostatic discharge prevention

A semiconductor device may include function circuits and a test line structure beside the function circuits. The test line structure includes standard cell circuit blocks including a first components and environment circuit regions between the standard cell circuit blocks. The environment circuit regions include second components. The first components are different from the second components in structure, arrangement or a combination thereof.

Semiconductor device

A device includes a semiconductor fin over a substrate, a gate dielectric on sidewalls of the semiconductor fin, and a gate electrode over the gate dielectric. A source/drain region is on a side of the gate electrode. A dislocation plane is in the source/drain region.

Source and drain dislocation fabrication in FinFETs

Growing community of inventors

Taipei, Taiwan

Ting-Yun Wu