Amic Technology Corporation

Ting-Kuo Yen

Yin-Chang Chen

Yung-Hsin Wang

I-Nan Chen

A method for erasing data stored in the memory cells of the floating gate flash memory is included. The method allows a plurality of sectors to be disposed in a same P well. The method includes erasing data stored in a first set of memory cells according to a control signal, randomly reading the data stored in a second set of memory cells affected by the erasing action of the first set of memory cells, and writing data read from the second set of memory cells onto the second set of memory cells.

Method for erasing and changing data of floating gate flash memory

A flash memory capable of utilizing one driving voltage output circuit to drive a plurality of word line drivers. The flash memory has a row driver for driving a predetermined word line to approach a predetermined voltage level. The row driver has a plurality of word line drivers, and each word line driver has a plurality of driving units and a driving voltage output circuit. The driving voltage output circuit is used for determining operating voltage levels of a plurality of driving voltages according to a plurality of second decoded signals without utilizing a plurality of first decoded signals, and for outputting a predetermined driving voltage to drive the predetermined word line to approach the predetermined voltage level when a driving unit electrically connected to the predetermined word line is turned on for connecting the predetermined word line and the driving voltage output circuit.

Flash memory capable of utilizing one driving voltage output circuit to drive a plurality of word line drivers

A regulated charge pump has a negative charge pump for generating a first output voltage according to an oscillation signal, and a regulator. The regulator has a level shift circuit, a differential amplifier for generating a compare signal, and an oscillator for generating the oscillation signal according to the compare signal. The level shift circuit has a plurality serially connected PMOS transistors. A first PMOS transistor has a first source connected to a first reference voltage, and a gate and a drain both connected to an output end of the level shift circuit. A second PMOS has a gate and a drain both connected to an output end of the negative charge pump.

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Miao-Li Hsien, Taiwan

Ting-Kuo Yen