International Business Machines Corporation

Siemens Aktiengesellschaft

Ting Hao Wang

David M Dobuzinsky

Dung-Ching Perng

Klaus Roithner

A method for increasing chip yield by reducing black silicon deposition in accordance with the present invention includes the steps of providing a silicon wafer suitable for fabricating semiconductor chips, depositing a first layer over an entire surface of the wafer, removing a portion of the first layer to expose a region suitable for forming semiconductor devices and etching the wafer such that a remaining portion of the first layer prevents redeposition of etched material on the wafer. A semiconductor assembly for reducing black silicon deposition thereon, includes a silicon wafer suitable for fabricating semiconductor chips, the wafer having a front surface for forming semiconductor devices, a back surface and edges. A deposited layer is formed on the wafer for covering the back surface and the edges such that redeposition of silicon on the back surface and edges of the wafer during etching is prevented.

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Milpitas, CA, United States of America

Ting Hao Wang