Macronix International Co., Ltd.

Cheng Uei Precision Industry Co., Ltd.

Ting-Feng Liao

Kuang-Wen Liu

Bin Wang

Kuang-Chao Chen

Yuan-Chieh Chiu

Yao-An Chung

Xu Liu

Chun-Fu Lin

Yao-Fu Chan

Yi-Chen Wang

I-Ting Lin

Mao-yuan Weng

Sheng-Hong Chen

Hao-Hao Huang

An electrical connector includes an insulating housing, a plurality of first terminals, a plurality of second terminals, a metal element and a fastening assembly. The insulating housing has a first insulating body, a second insulating body surrounding the first insulating body, a third insulating body and a fourth insulating body. The third insulating body is disposed to a rear end of a top surface of the first insulating body. The fourth insulating body is disposed to a top surface of the third insulating body. The plurality of the first terminals are surrounded by the first insulating body and the second insulating body. The plurality of the second terminals are surrounded by the third insulating body. The metal element is disposed to an outer surface of the insulating housing. The fastening assembly is positioned above the fourth insulating body.

Electrical connector

An electrical connector includes an insulating body, a plurality of first terminals and a plurality of second terminals. The insulating body includes a first insulating body, a second insulating body and a third insulating body. A rear end of the first insulating body has an accommodating groove. The first insulating body has a plurality of first terminal grooves. The second insulating body is mounted in the accommodating groove. Several portions of a top surface of the second insulating body are recessed downward to form a plurality of second terminal grooves. The third insulating body is mounted on a lower portion of the rear of the second insulating body. The plurality of the first terminals are mounted in the plurality of the first terminal grooves. The plurality of the second terminals are mounted in the plurality of the second terminal grooves.

Electrical connector with plug and socket capabilities

A method for fabricating a memory device includes: providing a substrate; forming a first dielectric layer over the substrate; forming a plurality of conductive layers and a plurality of dielectric layers alternately and horizontally disposed on the substrate; forming a channel column structure on the substrate and in the plurality of conductive layers and the plurality of dielectric layers, where a side wall of the channel column structure is in contact with the plurality of conductive layers; forming a second dielectric layer covering the first dielectric layer; and forming, in the first and second dielectric layers, a conductive column structure adjacent to the channel column structure and in contact with one of the plurality of conductive layers, where the conductive column structure includes a liner insulating layer as a shell layer.

Method for fabricating memory device

Methods, systems and apparatus for memory devices with multiple string select line (SSL) cuts are provided. In one aspect, a semiconductor device includes: a three-dimensional (3D) array of memory cells and a plurality of common source lines (CSLs) configured to separate the 3D array of memory cells into a plurality of portions. Each portion of the plurality of portions is between two adjacent CSLs and includes a plurality of conductive layers separated from each other by insulating layers and a plurality of vertical channels arranged orthogonally through the plurality of conductive layers and the insulating layers, each of the plurality of vertical channels including a string of memory cells. A top part of each portion of one or more portions includes at least two SSL cuts configured to separate the portion into multiple independent units, and each of the independent units is selectable by a corresponding SSL of multiple SSLs.

Memory devices with multiple string select line cuts

A waterproof socket connector includes an inner insulator, a plurality of terminals fastened in the inner insulator, at least one resistor, a conductive element, a grounding element, a shell, a sealing element and an outer insulator. The plurality of the terminals are a plurality of charging terminals and detection terminals. The at least one resistor is mounted to the detection terminals. The charging terminals are connected to the conductive element. The detection terminals are connected to the grounding element. The charging terminals are connected to the grounding element. The shell surrounds the inner insulator. A rear end of the shell is hollow to form an inner space. The sealing element is filled in the inner space. The outer insulator surrounds the inner insulator, the plurality of the terminals, the shell, the sealing element, the at least one resistor, the conductive element and grounding element.

Waterproof socket connector

A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure includes a source line structure. The source line structure includes a composite material formed in a trench. The composite material includes an oxide portion and a metal portion.

3D memory device including source line structure comprising composite material

A memory device includes a substrate. A first dielectric layer is disposed over the substrate. A plurality of conductive layers and a plurality of dielectric layers are alternately and horizontally disposed on the substrate. A channel column structure is disposed on the substrate and in the conductive layers and the dielectric layers. A side wall of the channel column structure is in contact with the plurality of conductive layers. A second dielectric layer covers the first dielectric layer. A conductive column structure is in the first and second dielectric layers, adjacent to the channel column structure, and in contact with one of the plurality of conductive layers. The conductive column structure includes a liner insulating layer as a shell layer.

Memory device and method for fabricating the same

A semiconductor structure includes a plurality of sub-array structures separated from each other by a plurality of isolation structures. The semiconductor structure further includes a three-dimensional array of memory cells. The memory cells include a plurality of cell groups disposed in the sub-array structures, respectively. The semiconductor structure further includes a plurality of conductive structures. Each of the conductive structures includes a plurality of conductive columns correspondingly disposed in each of the isolation structures along an extending direction of the isolation structures. The conductive columns penetrate through the each of the isolation structures. Each of the conductive columns has a circular cross section.

Semiconductor structure and method for forming the same

A memory device includes a semiconductor substrate, a first conductive layer, a plurality of second conductive layers, a plurality insulating layers, at least one contact plug and at least one dummy plug. The first conductive layer is disposed on the semiconductor substrate. The insulating layers are disposed on the first conductive layer. The second conductive layers are alternatively stacked with the insulating layers and insulated from the first conductive layer. The contact plug passes through the insulating layers and the second conductive layers, insulates from the second conductive layers and electrically contacts to the first conductive layer. The dummy plug, corresponds to the at least one contact plug, passes through the insulating layers and the second conductive layers, and insulates from the second conductive layers and the first conductive layer.

A memory device includes memory includes a multi-layers stack includes a plurality of insulating layers and a plurality conductive layers alternatively stacked on a semiconductor device, a plurality of memory cells formed on the conductive layers, a contact plug passing through the insulating layers and the conductive layers, and a dielectric layer including a plurality of extending parts each of which is inserted between each adjacent two ones of the insulating layers to isolate the conductive layer from the contact plug, wherein any one of the extending parts that has a shorter distance departed from the semiconductor substrate has a size substantially greater than a size of the others that has a longer distance departed from the semiconductor substrate.

A semiconductor device and a method of forming the same are provided. At least two separated stacked structures and at least two hard mask patterns respectively on the stacked structures are formed on a substrate. A patterned mask layer is formed on the substrate. The patterned mask layer has an opening which exposes a portion of top surfaces of the hard mask patterns and a portion of the substrate between the stacked structures. The exposed portion of the substrate is removed by using the patterned mask layer and the hard mask patterns as a mask, so as to form a trench in the substrate. An ion implantation process is performed by using the patterned mask layer and the hard mask patterns as a mask, so as to form a doped region in the substrate around the trench.

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Taipei, Taiwan

Ting-Feng Liao