Industrial Technology Research Institute

Ting-Fang Chien

Tzi-Cker Chiueh

Shih-Chiang Tsao

An-Nan Chang

Hou-Chiang Sun

Chien-Yung Lee

Chyi-Fan Jhun

A memory storage system includes multiple flash memory storage devices, multiple transmission interfaces and a central control device. The central control device has a cache and respectively coupled to the flash memory storage devices through the transmission interfaces. The central control device is for maintaining a block map table (BMT) to record a mapping relationship between multiple logical blocks and the physical blocks of the flash memory storage devices and the BMT is temporarily stored in the cache. In addition, the central control device uses the communication commands to access the physical blocks of the flash memory storage devices, in which the communication commands are transmitted to multiple controllers in the flash memory storage devices through the transmission interfaces and the controllers access the physical blocks according to communication commands. In this way, the system can effectively manage multiple flash memory storage devices.

Power-failure recovery device and method for flash memory

According to one exemplary embodiment, a method for storing and rebuilding data computes a corresponding parity after receiving an Input/Output command, and based on the parity, determines whether a final stripe corresponding to the Input/Output command is a full stripe. When the final stripe is a full stripe, a plurality of data and a parity corresponding to the Input/Output command are stored into a main hyper erase unit (HEU) in a disk storage system. When the final stripe is not a full stripe, a final parity is re-computed and written into at least two parity pages of a buffering HEU.

Method and system for storing and rebuilding data

Growing community of inventors

Taoyuan County, Taiwan

Ting-Fang Chien