Cadence Design Systems, Inc.

Siemens Industry, Inc.

Mentor Graphics Corporation

Tina Najibi

Paul Christopher Foster

Christoffer Simpson

Mark Kadoshnikov

Danielle Galimidi

Charlton Buck

Stephen Kenneth Sunter

Mark Hanson

Walter E Hartong

T Martin O'Leary

Don Walters

There is described a fire detection/notification system for detecting a weapons discharge comprising a network and a control panel. The network includes multiple wireless devices, and each device includes a fire-related sensor and a first weapons discharge sensor, and a second weapons sensor. The control panel is configured to identify the weapons discharge based on data generated by the first and second weapons discharge sensors and produce an alert signal in response to identifying the weapons discharge. The control panel is connected to the network and includes an output circuit configured to communicate with an emergency responder device external to the fire detection/notification system in response to receiving the alert signal.

System and method to improve emergency response time

There is described a fire detection/notification system for detecting a weapons discharge comprising a network and a control panel. The network includes multiple devices, and each device includes a fire-related detection sensor and a weapons discharge sensor. The control panel is configured to identify a fire-related hazard detected by the fire-related detection sensor and produce a first alert signal in response to identifying the fire-related hazard. The control panel is also configured to identify a weapons discharge hazard detected by the weapons discharge sensor and produce a second alert signal in response to identifying the weapons discharge hazard. The control panel is connected to the network and includes an output circuit configured to communicate with one or more emergency responder devices external to the fire detection/notification system in response to receiving the first alert signal, the second alert signal, or both signals.

This application discloses a computing system to identify multiple views of cells in a circuit design for selective utilization during analog fault simulation of the circuit design. The views of the cells can include two or more of macromodel design views, schematic design views, or extracted design views that includes parasitic elements extracted from a physical layout of the circuit design. The computing system can prompt generation of multiple netlists, each netlist generated based on a different combination of the identified views of the cells in the circuit design, or a list of macromodels with pin accurate subcircuit wrappers, parse and organize the cells in each netlist or the list of macromodels, identify one of the cells to inject with a defect, and selectively simulate portions from a plurality of the netlists based, at least in part, on the identified one of the cells to inject with the defect.

Analog fault simulation control with multiple circuit representations

An electronic design automation (EDA) tool to validate representations of a design is disclosed. Reference and compared representations of the design are intended to respond to stimulus in the same way, but at different levels of abstraction. The reference and compared representations are simulated, at some point, to each generate waveform signals and measured results. Simulation can be with the same tool or different tools. The same or different testbench can be used on the reference and compared representations in the simulation. A design representation validation function compares the two sets of generated waveform signals and compares the two sets of measured results to identify any violations. The measured results and/or waveform signals could be loaded from previous simulations and just validated within the validation tool. Loaded simulations could be for the reference representation with just simulation of the compared representation by the validation tool, or for both with no simulations run by the validation tool. Through an optional design representation validation interface, the violations are identified and are linked to interfaces that detail the violations in greater detail, for example, to aid in debugging why the reference and compared representations are not equivalent.

Model validation cockpit

A system is herein disclosed which allows for the interactive design and analysis of analog and mixed-signal circuits. Circuits may additionally be characterized and verified without leaving the environment provided by the system. The system may be used to analyze multiple circuit designs at the same time. In this manner a designer can create a test that sweeps over several circuit designs. Embodiments of the invention may be integrated with other circuit design tools and development systems.

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San Jose, CA, United States of America

Tina Najibi