Intel Corporation

Tin Poay Chuah

Min Suet Lim

Yew San Lim

Eng Huat Goh

Bok Eng Cheah

Jackson Chung Peng Kong

Jeff Ku

Khang Choong Yong

Boon Ping Koh

Jenny Shio Yin Ong

Chin Lee Kuan

Chee Chun Yee

Seok Ling Lim

Wil Choon Song

Howe Yin Loo

Mooi Ling Chang

Mohd Muhaiyiddin Bin Abdullah

Chee Ling Wong

Khai Ern See

Twan Sing Loo

Jia Yan Go

Santosh Gangal

Sujit Sharan

Chee How Lim

Hoay Tien Teoh

Stephen H Hall, Jr

Fern Nee Tan

Ananth Prabhakumar

Han Kung Chua

Siang Yeong Tan

Chin Kung Goh

Kevin J Byrd

Say Thong Tony Tan

Khai Ern Ke See

Ahmad Jalaluddin Yusof

Jon Sern Lim

Yi How Ooi

Cora Shih Wei Nien

Jia Lin Liew

Tai Loong Wong

Phaik Kiau Tan

Kit Chew Chee

Khai Em Ke See

There may be provided a fastener arrangement. The fastener arrangement may include a first fastener tape including a first plurality of electrically conductive coupling elements and a first plurality of non-electrically conductive coupling elements. The fastener arrangement may further include a second fastener tape comprising a second plurality of electrically conductive coupling elements and a second plurality of non-electrically conductive coupling element. The fastener arrangement may further include a slider couplable to the first fastener tape and the second fastener tape for reversibly interleaving and interlocking the first plurality of electrically conductive and non-electrically conductive coupling elements with their corresponding second plurality of electrically conductive and non-electrically conductive elements. The interleaved and interlocked first and second plurality of electrically conductive coupling elements may form a plurality of conductive-bridges and the interleaved and interlocked first and second plurality of non-electrically conductive coupling elements may form a plurality of insulation-bridges.

Flexible printed circuit board arrangement

Disclosed herein are via plug capacitors for incorporation into electronic substrates, and related methods and devices. Exemplary via plug capacitor structures include a capacitive element within a via extending at least partially through an electronic substrate and first and second electrodes coupled to the capacitive element.

Via plug capacitor

In one embodiment, a system includes a first circuit defining recesses along an edge of the first circuit board, and a second circuit board defining fins extending from at least one outer edge of the second circuit board. The fins of the second circuit board are positioned within the recesses of the second circuit board to connect the circuit boards in a co-planar manner. The fins and recesses may be shaped to provide an interlocking connection of the first and second circuit boards in the co-planar direction.

Co-planar interconnection mechanisms for circuit boards

The present disclosure relates to a printed circuit board assembly including a first circuit board including a first footprint, the first circuit board further includes a plurality of first vertical vias extending between a first side and an opposing second side; a second circuit board including a second footprint smaller than the first footprint, the second circuit board further includes a plurality of second vertical vias extending between a subsequent first side and an opposing subsequent second side; an adhesive layer coupling the first side to the subsequent first side; and a plurality of third vertical vias extending through the first side and the subsequent first side.

Asymmetrical laminated circuit boards for improved electrical performance

Particular embodiments described herein provide for an electronic device that can be configured to include a support structure that includes a radiation shield groove that extends past a surface of the support structure and into the support structure, a radiation source on the substrate, and a radiation shield around the radiation source, where the radiation shield includes a wall secured to the support structure and a groove channel coupling wall that extends past a surface of the support structure and into the radiation shield groove.

Radiation shield and groove in support structure

The present disclosure is directed to a hybrid dielectric interconnect stack for a printed circuit board having a first dielectric layer with a first dielectric constant and a first dielectric loss tangent positioned over an intermediate layer, which includes a first dielectric sublayer with a first sublayer dielectric constant and a first sublayer dielectric loss tangent, an embedded conductive layer, and a second dielectric sublayer with a second sublayer dielectric constant and a second sublayer dielectric loss tangent, in which the embedded conductive layer is positioned between the first and second dielectric sublayers, and a second dielectric layer with a second dielectric constant and a second dielectric loss tangent, in which the intermediate layer is positioned between the first and second dielectric layers.

Hybrid boards with embedded planes

Particular embodiments described herein provide for an electronic device that can be configured to include a radiation shield that includes a zipper. The radiation shield can include a wall that extends from a support structure of the electronic device, a first portion that is coupled to a cold plate over a radiation source, a second portion that is coupled to the wall, and a zipper that can zip the first portion to the second portion together and can unzip to separate the first portion from the second portion.

Radiation shield with zipper

Disclosed herein are via plug resistors for incorporation into electronic substrates, and related methods and devices. Exemplary via plug resistor structures include a resistive element within and on a surface of a via extending at least partially through an electronic substrate and first and second electrodes coupled to the resistive element.

Via plug resistor

Techniques for power tunnels on circuit boards are disclosed. A power tunnel may be created in a circuit board by drilling through non-conductive layers to a conductive trace and then filling in the hole with a conductor. A power tunnel can have a high cross-sectional area and can carry a larger amount of current than an equivalent-width trace, reducing the area on a circuit board required to carry that amount of current.

Technologies for power tunnels on circuit boards

According to the present disclosure, a laptop may be provided with a compartment including a moveable segment, an expandable heat exchanger with a movable section, and an expandable fan unit. The release of the movable segment of the compartment from a lower portion of the compartment produces an opening in the compartment and the movable section of the expandable heat exchanger is extended downward, and the expandable fan unit is lowered when the movable segment of the compartment is released.

Expandable thermal solution for laptops

A substrate may be included in an electronic device. The substrate may include a first layer that may include a dielectric material. The first layer may define a substrate surface. The substrate may include a second layer optionally including the dielectric material. The second layer may be coupled to the first layer. A wiring trace may be located in the substrate. A recess may extend through the substrate surface, the first layer, and may extend through the second layer. A substrate interconnect may be located within the recess. The substrate interconnect may be at least partially located below the substrate surface. The substrate interconnect may be in electrical communication with the wiring trace.

Electronic device and crosstalk mitigating substrate

To address the issue of shrinking volume that can be allocated for electrical components, a system can use an interposer with a flexible portion. A first portion of the interposer can electrically connect to a top side of a motherboard. A flexible portion of the interposer, adjacent to the first portion, can wrap around an edge of the motherboard. A peripheral portion of the interposer, adjacent to the flexible portion, can electrically connect to a bottom side of the motherboard. The peripheral portion can be flexible or rigid. The interposer can define a cavity that extends through the first portion of the interposer. A chip package can electrically connect to the first portion of the interposer. The chip package can be coupled to at least one electrical component that extends into the cavity when the chip package is connected to the interposer.

Interposer with flexible portion

An electronic device and associated methods are disclosed. In one example, the electronic device includes a first rigid substrate, a second rigid substrate, a flexible substrate comprising a first portion attached to the first rigid substrate, a second portion attached to the second rigid substrate, a middle portion connecting the first portion to the second portion, wherein the middle portion is bent, and metallic traces therethrough, and a component forming a direct interface with the middle portion of the flexible substrate, the component electrically coupled to the metallic traces. In selected examples, the device further includes a casing.

Three dimensional foldable substrate with vertical side interface

According to the various aspects, the present device includes a printed circuit board having a top surface and a bottom surface, with a plurality of semiconductor devices coupled to the top surface and a flexible electromagnetic shield wrap conformally positioned over and between the plurality of semiconductor devices and the top surface of the printed circuit board. The flexible electromagnetic shield wrap is conformally positioned by applying a vacuum and is removable after the vacuum seal is broken.

Wrappable EMI shields

A printed circuit board (PCB) comprises a blind via and a discrete component vertically embedded within the blind via.

Growing community of inventors

Bayan Lepas, Malaysia

Tin Poay Chuah