Intel Corporation

Marvell International Limited

Timothy S Beatty

Franco Ricci

Lawrence T Clark

Thomas D Fletcher

Sujat Jamil

R Frank O'Bleness

Hong-Yi Chen

Tom Marko Hameenanttila

Christopher P McAllister

Paul McAllister

According to some embodiments, an apparatus having corresponding methods includes a storage module configured to store data and instructions; a first processor pipeline configured to process the data and instructions when the first processor pipeline is selected; a second processor pipeline configured to process the data and instructions when the second processor pipeline is selected; and a selection module configured to select either the first processor pipeline or the second processor pipeline.

Dynamic pipeline reconfiguration including changing a number of stages

A memory driver architecture and associated methods are generally described.

Memory driver architecture and associated methods

A method and apparatus for preventing charge damage to a protected structure during processing of a semiconductor device. A first source/drain region of a protection transistor is coupled to a protected transistor gate. A second source/drain region of the protection transistor is coupled to ground. The protection transistor is then turned on during the processing of the device to ground the protected transistor gate.

Method for protecting a transistor gate from charge damage

An integrated circuit includes: a comparator coupled in a configuration to compare two voltages. One of the two voltages includes a semiconductor junction voltage drop. The other of the two voltages includes a voltage signal, X V.sub.t, where V.sub.t is a thermal voltage and X includes a selected signal value, which modulates the thermal voltage. The configuration includes a feedback path to vary X until X V.sub.t approximately equals the voltage including the semiconductor junction voltage drop.

Temperature measurement and compensation scheme

Interconnect structure for protecting a transistor gate from charge

An oscillator that has a substantially-constant voltage source configured such that it does not require the voltage source to be tuned to a particular voltage to oscillate a particular frequency. The oscillator has greater precision and reliability since the inputs of the comparator are periodically switched to reduce the effects of comparator bias and to equalize the voltage stresses on the inputs of the comparator. Greater precision is also achieved through the use of a discrete resistor and a discrete capacitor to define the frequency of the oscillator. The present invention provides an oscillator and method to generate a periodic signal that is tamperproof because the circuitry that defines the period is either integrated onto the integrated circuit or contained within the package containing the integrated circuit. The oscillator may be used as a frequency reference in a speed governor circuit and that speed governor may be included in an integrated circuit such that the speed governor disables a functional block of the integrated circuit when the clock frequency exceeds a frequency limit.

Growing community of inventors

Mesa, AZ, United States of America

Timothy S Beatty