Micron Technology Incorporated

Timothy P O'Brien

Howard E Rhodes

Rod C Langley

Russell C Zahorik

Thomas N Melody

John E Knudson

Leslie A Pearey

A semiconductor processing method of providing an electrically conductive interconnecting plug between an elevationally inner conductive node and an elevationally outer conductive node includes, a) providing an inner node location to which electrical connection is to be made; b) providing an electrically insulative layer outwardly over the inner node location; c) patterning and etching a contact opening through the insulative layer to the inner node location; d) substantially filling the contact opening with an electrically conductive material to provide a conductive plug within the contact opening to the inner node location, the conductive plug defining an outermost fang gap between the conductive plug and the electrically insulative layer, the fang gap having a first width; e) widening the fang gap to a second width which is greater than the first width by a timed RF plasma etch of the electrically conductive material; f) providing an outer metal layer over the conductive plug after the widening step, the metal layer at least partially filling the widened fang gap; and g) patterning the metal layer into a conductive line which electrically interconnects with the conductive plug.

Semiconductor processing method of providing an electrically conductive

In one aspect, a semiconductor processing method for connecting a metal layer to a plug when there is a fang gap between the plug and a layer surrounding the plug includes: a) forming a conductive material within an opening in a surrounding layer; b) etching the conductive material with a first etch chemistry to form a fang gap between the conductive material and the surrounding layer, the fang gap having a first width; c) etching the conductive material with a second etch chemistry to widen the fang gap to a second width which is greater than the first width, the second etch chemistry being different from the first etch chemistry; and d) providing an outer metal layer over the conductive plug after widening the fang gap, the metal layer at least partially filling the widened fang gap.

A semiconductor processing method for decreasing electrical contact resistance between different elevation electrically conductive layers is disclosed. The method includes applying an aluminum layer atop a partially processed semiconductor wafer, with the aluminum layer having a defined upper surface. The semiconductor wafer with applied aluminum layer is exposed to an oxidizing atmosphere, forming an electrically resistive aluminum oxide at the upper surface of the aluminum layer. An interlayer insulating dielectric material is applied atop the aluminum layer. It is selectively patterned and etched to define a contact opening to the aluminum layer. A layer of titanium metal is applied atop the patterned and etched interlayer dielectric to a preselected thickness. The titanium metal contacts the upper aluminum oxide surface of the aluminum layer within the contact opening. The titanium metal is reacted with the aluminum oxide in the contact to transform aluminum oxide into a less electrically resistive titanium oxide. After application of the titanium metal, a layer of conductive material is applied atop the wafer and thereafter selectively patterned and etched to form a desired the conductive runner.

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Boise, ID, United States of America

Timothy P O'Brien