International Business Machines Corporation

Endicott Interconnect Technologies, Inc.

Timothy Leroy Wells

John Joseph Konrad

Jeffrey McKeveny

John Steven Kresge

Andrew Michael Seman

James W Fuller, Jr

Timothy Eugene Antesberger

Jose A Rios

Allen H Hopkins

Ralph A Barrese

Stephen Krasniak

Gary Gajdorus

Robert C Schaffer

Voya Rista Markovich

Konstantinos I Papathomas

Anilkumar Chinuprasad Bhatt

James Warren Wilson

Amit Kumar Sarkhel

Michael Wozniak

Edmond Otto Fey

Kevin Taylor Knadle

Norman A Card

Joseph Alphonse Kotylo

Robert Douglas Edwards

Edward Lee Arrington

Thomas R Miller

William E Wilson

Jerzy Maria Zalesinski

Roy H Magnuson

John Gerard Gaudiello

Stephen Joseph Fuerniss

Richard Allen Day

James D Herard

Lawrence Robert Blumberg

Michael James Cummings

Michael Vito Longo

David Anton Klueppel

Raymond C Tompkins

Edmund Glenn Benjamin

Biebele Opubo Benebo

Robert J Lerner

George Frederick Reel

An apparatus and method for plating a workpiece. The apparatus comprises, generally, an anode, a cathode, and a selective anode shield/material flow assembly. In use, both the anode and the cathode are immersed in a solution, and the cathode is used to support the workpiece. During an electroplating process, the anode and the cathode generate an electric field emanating from the anode towards the cathode, to generate a corresponding current to deposit an electroplating material on the workpiece. The selective shield/material flow assembly is located between the anode and the cathode, and forms a multitude of adjustable openings. These opening have sizes that are adjustable during the electroplating process for selectively and controllably adjusting the amount of electric flux passing through the selective shield/material flow assembly and the distribution of the electroplating material on the workpiece. The selective shield/material flow assembly can also be used with an electroless plating system. At least one selective shield material flow mechanism is used in a selective shield material flow assembly.

Selective shield/material flow mechanism

A method of plating a circuit pattern on a substrate to produce a circuitized substrate (e.g., a printed circuit board) in which a dual step metallurgy application process is used in combination with a dual step photo-resist removal process. Thru-holes are also possible, albeit not required.

Plating method for circuitized substrates

A method of making a circuitized substrate in which the substrate's commoning bar, used during the plating of the circuitry on the substrate, is terminated from the various conductors using a laser. In a preferred embodiment, the laser acts through a dielectric layer (soldermask) which is applied over the circuitry, including the commoning bar and connected parts. The laser may also be used to expose selected ones of the circuit's other parts, including various pads used to accommodate a wirebond (from a chip) and also solder balls for eventual placement of the substrate on a larger circuit board.

Method of making circuitized substrate

A method of making a circuitized substrate in which a commoning bar, used during the plating of the circuitry on the substrate and coupled to a second set of conductors which in turn are coupled to a first set of conductors, is terminated from the second set of conductors.

A process for manufacturing a land grid array connector for a printed wiring board is disclosed. The process does not require electroplating precious metal overlays. Therefore, no commoning bar is required. Another benefit of the invention includes a connector design using only a flash, soft gold application in the outer surface of the connector. Physical hardness and durability are derived from a thin palladium layer lying beneath the flash gold layer.

Process for manufacturing a printed wiring board

A method of fabricating a printed circuit device including an electrically insulating substrate, and first, second, and third sets of conductors formed on a top surface of the substrate is disclosed. The method includes forming an oxide layer on the set of second conductors; forming a solder mask on the oxide layer; forming a composite layer on the first set of conductors; and forming a solder layer on at least a portion of the third set of conductors.

Method of fabricating printed circuit board with mixed metallurgy pads

Printed circuit board with mixed metallurgy pads and method of fabrication

Through-holes in a substrate are masked during plating of the substrate by substantially filling the through-holes with a liquid material, followed by applying a photoimageable material to an external surface of the substrate, forming a predetermined pattern in the photoimageable material, circuitizing the predetermined pattern and then removing both the photoimageable material and the liquid material from the through-holes.

Method for masking a hole in a substrate during plating

Printed circuit boards, cards and chip carriers are fabricated by treating an already circuitized substrate with a swelling agent, then treating the circuitized substrate with a composition containing an alkaline permanganate, a chromate and/or chlorite and then applying a metal layer to coat the circuitized portion of the substrate.

Process for reducing extraneous metal plating

A wiring board for mounting an electrical device, which has an array of connectors thereon arranged in a grid pattern, wherein the connectors have at least two levels of criticality of connection to the substrate. The substrate has a plurality of mounting structure or features arranged in the same grid pattern to connect with the array of connectors on the electrical device. The mounting structures or features are divided into a plurality of at least two groups, with each group corresponding to a level of criticality of the connectors on the device. Each group of mounting structures has a discernible feature differing from each other group, to thereby permit different levels of inspection criteria for each group. The invention also contemplates a method of forming a substrate having the features for connecting the connectors on the device that have different levels of criticality

Structure and method for forming the same of a printed wiring board having built-in inspection aids

A circuitized semiconductor structure comprising a layer of dielectric material, a catalyst seed layer above the layer of dielectric material, a layer of photoimageable dielectric material on the catalyst seed layer and having openings therein, a nickel layer in the openings and a layer of copper in the openings above the nickel layer and being coplanar with the top of the layer of dielectric material is provided, along with a method for its fabrication.

Circuitized semiconductor structure and method for producing such

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Apalachin, NY, United States of America

Timothy Leroy Wells