Ati Technologies Ulc

Advanced Micro Devices Corporation

Ati International Srl

Ati Technologies Inc.

Timothy Kelley

Michael Mantor

Laurent Lefebvre

Mark Fowler

Mika Tuomi

Mikko Alho

Kaj Tuomi

Patrick Klas Rudolf Buss

Jari Antero Komppa

Kiia Kaappoo Kallio

Jonathan Lawrence Campbell

David A Gotwalt

Matthew P Radecki

Kiia Kallio

Michael G Silver

Phillip J Rogers

A method, computer system, and a non-transitory computer-readable storage medium for performing primitive batch binning are disclosed. The method, computer system, and non-transitory computer-readable storage medium include techniques for generating a primitive batch from a plurality of primitives, computing respective bin intercepts for each of the plurality of primitives in the primitive batch, and shading the primitive batch by iteratively processing each of the respective bin intercepts computed until all of the respective bin intercepts are processed.

Hybrid render with deferred primitive batch binning

A system, method and a non-transitory computer readable storage medium are provided for hybrid rendering with deferred primitive batch binning. A primitive batch is generated from one or more primitives. A bin is identified for processing the primitive batch. At least a portion of each primitive intersecting the identified bin is processed and a next bin for processing the primitive batch is identified based on an intercept walk order. The processing is iteratively repeated for the one or more primitives in the primitive batch for successive bins until all primitives of the primitive batch are completely processed. Then, the one or more primitives in the primitive batch are further processed.

A system, method and a computer program product are provided for hybrid rendering with deferred primitive batch binning. A primitive batch is generated from a sequence of primitives. Initial bin intercepts are identified for primitives in the primitive batch. A bin for processing is identified. The bin corresponds to a region of a screen space. Pixels of the primitives intercepting the identified bin are processed. Next bin intercepts are identified while the primitives intercepting the identified bin are processed.

A multiprocessor system includes a plurality of special purpose processors that perform different portions of a related processing task. A set of commands that cause each of the processors to perform the portions of the related task are distributed, and the set of commands includes a predicated execution command that precedes other commands within the set of commands. It is determined whether commands subsequent to the predicated execution command are intended to be executed by a first processor or a second processor based on information in the predicated execution command and the set of commands includes all commands to be executed by each processor.

Applying non-homogeneous properties to multiple video processing units (VPUs)

A system and method for applying non-homogeneous properties to multiple video processing units (VPUs) in a multiple VPU system are described. Respective VPUs in the system cooperate to produce a frame to be displayed. In various embodiments, data output by different VPUs in the system is combined, or merged, or composited to produce a frame to be displayed. In load balancing modes, each VPU in the system performs different tasks as part of rendering a same frame, and therefore typically executes different commands. In various embodiments, efficiency of the system is enhanced by forming a single command buffer for execution by all of the VPUs in the system even though each VPU may have a different set of commands to execute in the command buffer.

A method and system for accommodating at least one high priority data element from a plurality of data elements written into a ring buffer including a processor that preempts a ring buffer by modifying at least one of the data elements previously written to the ring buffer to create modified data elements in response to detecting a high priority data element to be written into the ring buffer. The processor modifies the plurality of data elements previously written to the ring buffer to create the modified data elements. The processor resubmits to the ring buffer at least one of the data elements corresponding to at least one of the modified data elements for execution by a graphics co-processor in response to processing the at least one high priority data element.

System and method for processing high priority data elements

A video graphics system employs a method and apparatus for improving throughput of the system. The video graphics system includes a graphics driver, a graphics processor, and a memory. Responsive to receiving a drawing command from an application, the graphics driver determines whether the graphics processor can begin executing the drawing command within a desired period of time. When the graphics processor is heavily loaded and cannot begin executing the command within the desired period of time, the graphics driver partially processes stored vertex information associated with the drawing command, and preferably stores the pre-processed vertex information in the memory. The graphics driver then preferably issues a new drawing command relating to the stored pre-processed information and instructing the graphics processor not to perform any of the processing already performed by the graphics driver. The graphics driver is preferably implemented in software and stored on a computer-readable storage medium.

Method and apparatus for improving processing throughput in a video graphics system

A video graphics system employs a method and apparatus for selectively providing drawing commands to a graphics processor to improve the processing efficiency of the system. The video graphics system includes a graphics driver, a graphics processor, and a memory. The graphics driver is operably coupled to an application that issues drawing commands to be processed by the video graphics system. Each drawing command includes an address of a location within the memory that includes vertex information for the vertices of one or more graphics primitives to be displayed on a display device operably coupled to the graphics processor. The vertex information is stored in the memory by the application prior to issuance of a drawing command referencing the location in memory of the stored vertex information. Some time after the application stores the vertex information in memory, but preferably not later than responsive to receipt of a drawing command referencing the memory location of the stored vertex information, the graphics driver determines a boundary defining a volume containing the vertices corresponding to the stored vertex information. Responsive to receiving the drawing command, the graphics driver determines whether at least a portion of the boundary intersects a viewing volume of the display device. When at least a portion of the boundary intersects the viewing volume, the graphics driver provides the drawing command to the graphics processor; otherwise, the graphics driver preferably discards the command. The graphics driver is preferably implemented in software and stored on a computer-readable storage medium.

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Orlando, FL, United States of America

Timothy Kelley