Infineon Technologies Austria Ag

Infineon Technologies Ag

Timothy Henson

Ling Ma

Robert Paul Haase

Oliver Blank

Niraj Ranjan

Ashita Mirchandani

Laszlo Juhasz

Weichun Huang

Lina Guo

A transistor device includes: a semiconductor body having opposing first and second surfaces; an edge termination region laterally surrounding an active area; a drain region of a first conductivity type at the second surface; and a drift region of the first conductivity type on the drain region. In the active area, a body region of a second conductivity type is on the drift region, a source region of the first conductivity type is on the body region, and at least one gate electrode is positioned in a gate trench that extends into the semiconductor body from the first surface. A superjunction structure includes columns of the second conductivity type extending into the semiconductor body substantially perpendicular to the first surface in the active area and edge termination region. A first contact extends through the body region for each second conductivity type column in the active region and is electrically conductive.

Transistor device and method for producing a transistor device

A semiconductor device is described. The semiconductor device includes: a semiconductor substrate having an edge, an active area spaced inward from the edge, and an edge termination area laterally surrounding the active area; and a plurality of transistor cells formed in the active area, each transistor cell including a source region of a first conductivity type and a body region of a second conductivity type opposite the first conductivity type. The edge termination area includes a plurality of needle-shaped compensation trenches and is devoid of complete transistor cells. A body doping region of the second conductivity type and that includes the body regions of the transistor cells extends from the active area into the edge termination area. The body doping region in the edge termination area is physically and electrically isolated from the body doping region in the active area.

Edge termination structure for power transistor devices

A semiconductor device includes: a semiconductor substrate; an epitaxial layer or layer stack on the semiconductor substrate; a plurality of transistor cells of a first type formed in a first region of the epitaxial layer or layer stack and electrically coupled in parallel to form a vertical power transistor; a plurality of transistor cells of a second type different than the first type and formed in a second region of the epitaxial layer or layer stack; and an isolation structure that laterally and vertically delimits the second region of the epitaxial layer or layer stack. Sidewalls and a bottom of the isolation structure include a dielectric material that electrically isolates the plurality of transistor cells of the second type from the plurality of transistor cells of the first type in the epitaxial layer or layer stack. Methods of producing the semiconductor device are also described.

Isolation structure for separating different transistor regions on the same semiconductor die

A multi-chip assembly includes: a first power transistor die having a source terminal facing a first direction and a drain terminal facing a second direction opposite the first direction; and a second power transistor die having a drain terminal facing the first direction, and a source terminal facing the second direction. A dielectric material occupies a gap between the first power transistor die and the second power transistor die, and secures the first power transistor die and the second power transistor die to one another. A metallization connects the source terminal of the first power transistor die to the drain terminal of the second power transistor die at a same side of the multi-chip assembly. The gap occupied by the dielectric material is less than 70 μm. Corresponding methods of producing multi-chip assemblies are also described.

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Mount Shasta, CA, United States of America

Timothy Henson