Silicon Laboratories Inc.

Timothy E Litch

Paul Zucker

Paul Zavalney

William Durbin

A method includes receiving a plurality of requests to perform accesses for associated DMA channels and arbitrating the requests. The arbitration includes selectively granting a given request of the plurality of requests based at least in part on an associated fixed priority of the request and an associated priority weighting of the request. The priority weighting regulates which request or requests of the plurality of requests are considered at a given time.

Arbitrating direct memory access channel requests

A method includes processing descriptors to control a direct memory access (DMA) channel. The method includes synchronizing at least part of the processing, which includes processing a first descriptor of the descriptors to cause the execution to selectively pause based on a trigger value.

Direct memory access descriptor-based synchronization

A method includes processing a direct memory access (DMA) descriptor in a DMA controller. The method includes storing first data of the DMA descriptor at an address that is identified by second data of the DMA descriptor.

Immediate direct memory access descriptor-based write operation

An apparatus includes an integrated circuit that includes a processing core and a direct memory access (DMA) engine. The DMA engine is adapted to process descriptors to control DMA communications. The descriptors contain data indicating communication endpoints that are associated with the DMA communications. The DMA engine is adapted to use other data contained in at least one of the descriptors to control branching of descriptor execution among multiple execution paths.

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Dripping Springs, TX, United States of America

Timothy E Litch