Qualcomm Incorporated

Timothy Donald Gathman

Lai Kan Leung

Chirag Dipak Patel

Xinmin Yu

Aleksandar Miodrag Tasic

Ojas Choksi

Wu-Hsin Chen

Klaas Van Zalinge

Sasha Vujcic

Rajagopalan Rangarajan

Janakiram Ganesh Sankaranarayanan

Jun Tan

Mehmet Ipek

Li-chung Chang

Dinesh Jagannath Alladi

Yi Zeng

Rui Li

Elias Dagher

Hong Sun Kim

Wei Zhuo

Ravi Sridhara

Rahul Karmaker

Ibrahim Ramez Chamas

Yuhua Guo

Kiyong Choi

Bindu Gupta

Wenbang Xu

Li-Chung Chang

An amplifying circuit includes a first reconfigurable amplifier configured to selectively operate in a cascode mode or a non-cascode mode, wherein an input of the first reconfigurable amplifier is coupled to a first input of the amplifying circuit, and an output of the first reconfigurable amplifier is coupled to an output of the amplifying circuit. The amplifying circuit also includes a second reconfigurable amplifier configured to selectively operate in the cascode mode or the non-cascode mode, wherein an input of the second reconfigurable amplifier is coupled to a second input of the amplifying circuit, and an output of the second reconfigurable amplifier is coupled to the output of the amplifying circuit.

Reconfigurable amplifier

A reconfigurable amplifier includes a first transistor having a gate coupled to an input of the reconfigurable amplifier, and a source coupled to a ground. The reconfigurable amplifier also includes a gate control circuit, and a second transistor having a gate coupled to the gate control circuit, a source coupled to a drain of the first transistor, and a drain coupled to an output of the reconfigurable amplifier, wherein the gate control circuit is configured to output a bias voltage to the gate of the second transistor in a cascode mode, and output a switch voltage to the gate of the second transistor in a non-cascode mode. The reconfigurable amplifier further includes a load coupled to the output of the reconfigurable amplifier.

An example apparatus includes a polyphase transconductance-capacitor filter. The polyphase filter includes a DC bias voltage node, a plus in-phase filter unit, a minus in-phase filter unit, a plus quadrature-phase filter unit, and a minus quadrature-phase filter unit. Each filter unit respectively includes an input node, an output node, and a control node. The polyphase filter also includes a plus in-phase switch and a minus in-phase switch. The plus in-phase switch is coupled to the control node of the plus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit. The minus in-phase switch is coupled to the control node of the minus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit.

Polyphase filter with interphase coupling

Certain aspects of the present disclosure provide methods and apparatus for processing signals using a current-mode biquad filter, which may have a tunable bias current and/or tunable capacitance. One example apparatus is a current-mode biquad filter circuit that includes a first input current node, a first capacitive element coupled to the first input current node, a first output current node, a first active filter circuit coupled between the first input current node and the first output current node, and a second active filter circuit coupled between the first input current node and the first output current node. The second active filter circuit is complementary to the first active filter circuit.

Complementary current-mode biquad with high linearity

An apparatus is disclosed for complementary variable gain amplification. In an example aspect, the apparatus includes a variable gain amplifier that includes multiple amplifiers. The multiple amplifiers include at least one first amplifier and at least one second amplifier cascaded together in series. The first amplifier includes a first set of transistors having a first doping type. At least a portion of the first set of transistors is configured to implement a first current mirror. The second amplifier includes a second set of transistors having a second doping type. At least a portion of the second set of transistors is configured to implement a second current mirror. The second current mirror is coupled to the first current mirror.

Complementary variable gain amplification

A receiver may include a time-interleaved charge sampler comprising a charge sampler switch in series with a charge sampler capacitor. The receiver may also include a current buffer configured to drive the time-interleaved charge sampler.

Time-interleaved charge sampler receiver

An apparatus is disclosed for current-mode filtering using current steering. In an example aspect, the apparatus includes a filter. The filter includes a current-steering node, a first output node, a second output node, a wideband path, and a narrowband path. The wideband path is coupled between the current-steering node and the first output node. The wideband path includes a wideband low-pass filter configured to pass frequencies within a wide passband. The narrowband path is coupled between the current-steering node and the second output node. The narrowband path includes a narrowband low-pass filter configured to pass a portion of the frequencies that are within a narrow passband.

Current-mode filtering using current steering

A filter circuit may include a first path having a first complex baseband filter. The circuit may further include a second path having a second complex baseband filter. The circuit may further include a combiner coupled to an output of the first complex baseband filter and an output of the second complex baseband filter.

Filter circuit

Certain aspects of the present disclosure relate to multi-band filter architectures and methods for filtering signals using the multi-band filter architectures. One example multi-band filter generally includes a transconductance-capacitance (gm-C) filter and a reconfigurable load impedance coupled to an output of the gm-C filter, the reconfigurable load impedance comprising a first gyrator circuit coupled to a second gyrator circuit.

Multi-band filter architectures

An apparatus is disclosed for current-mode filtering with switching. In an example aspect, the apparatus includes a filter including two input nodes, two output nodes, two differential paths, two bypass nodes respectively coupled between the two input nodes and the two output nodes along the two differential paths, a high-pass filter coupled between the two bypass nodes and the two output nodes, two low-pass switches, a band-pass switch, and a low-pass filter coupled in series with the high-pass filter along the two differential paths. The high-pass filter includes two series capacitors, which are respectively coupled between the two bypass nodes and the two output nodes, and two shunt inductors, which are respectively coupled to the two bypass nodes. The two low-pass switches are respectively coupled in parallel with the two series capacitors. The band-pass switch is coupled in series between the two shunt inductors.

Current-mode filtering with switching

Methods, systems, and devices for wireless communication are described for enhanced broadband operation of an active mixer. In an example, an apparatus may include an active mixer that converts between radio frequency (RF) signals and intermediate frequency (IF) signals based at least in part on an alternating current (AC) local oscillator (LO) signal, wherein a direct current (DC) current generated within the active mixer is dependent in part on a bias voltage and the AC LO signal. The apparatus may include a mixer biasing circuit that generates the bias voltage for the active mixer, a magnitude of the bias voltage having an inverse relationship to an amplitude of the AC LO signal.

Enhanced broadband operation of an active mixer

Devices and techniques are described to extract specific frequency band signals from a wide-band radio-frequency signal. A network entity may include an antenna for receiving the wide-band radio-frequency signal and may include a receiver circuit for processing the wide-band radio-frequency signal. The receiver circuit may include a transconductance amplifier and a plurality of single-band circuits. The transconductance amplifier may be configured to generate an amplified wide-band radio-frequency signal and send it to one or more of the single-band circuits. Each single-band circuit may be configured to extract a different frequency band signal from the amplified wide-band radio-frequency signal.

Multi-band radio-frequency reception

In certain aspects, a circuit comprises a low noise amplifier (LNA) configured to receive a radio frequency (RF) signal, a first mixer coupled to the low noise amplifier (LNA), and a first trans-impedance filter coupled to the first mixer. The first trans-impedance filter comprises a tunable inductor and capacitor (LC) network configured to be a portion of a doubly terminated LC ladder filter and a trans-impedance amplifier (TIA) coupled to the tunable inductor and capacitor (LC) network. The circuit further comprises a second mixer coupled to the low noise amplifier (LNA) and a second trans-impedance filter coupled to the second mixer.

Reconfigurable wideband current-mode filters

An wideband amplifier circuit such as a transimpedance amplifier achieves improved amplifier and/or system performance, such as a reduced input impedance. The transimpedance amplifier may use a complementary common gate stage that receives an input signal and generates current to a current summing stage. In one instance, an input current is received by a complimentary common gate stage that includes a first common gate transistor and a second common gate transistor, each having different polarities, in which the first terminals of each of the transistors are configured to receive the input current. Each of the transistors generates an output current to a current summing stage that generates an output voltage at an output terminal. The output voltage may be based on the combined currents from the first common gate transistor and second common gate transistor.

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San Diego, CA, United States of America

Timothy Donald Gathman