Imec Vzw

Universiteit Gent

Timothy De Keulenaer

Guy Torfs

Johan Bauwelinck

Zhisheng Li

Yu Ban

Jeffrey Sinsky

Geert De Peuter

Described herein is a feed forward equalizer that is configured to operate in a normal operational mode and in a test operational mode. The feed forward equalizer has an input port and an output port which are used for the normal operational mode. A test input port and a test output port are provided in the feed forward equalizer, and are used for the test operational mode. Buffers may be provided for matching the impedance of respective ones of the input, output, test input, and test output ports. The feed forward equalizer allows testing during development, and once mounted in an integrated circuit, without interfering with the normal operational mode.

Test circuits

Circuitry for converting a multi-level signal into at least one binary signal, having a period T and comprising n signal levels, includes comparing and splitting circuitry configured for comparing a value of the multi-level signal with (n&#x2212;1) different reference values, and having N sets of (n&#x2212;1) output terminals for outputting N sets of (n&#x2212;1) output signals indicating whether the value of the multi-level signal is below or above the (n&#x2212;1) reference values. The circuitry also includes N sets of (n&#x2212;1) sample-and-hold circuits having an input and an output and being configured for operating at a clock period N*T, wherein each output terminal is connected to the input of a sample-and-hold circuit. Further, the circuitry includes logical circuitry connected to the outputs of the N sets of (n&#x2212;1) sample-and-hold circuits for generating at least one binary signal having a period N*T.

Circuitry and method for multi-level signals

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Ghent, Belgium

Timothy De Keulenaer