International Business Machines Corporation

Lenovo (Singapore) Pte. Ltd.

Timothy Charles Daun-Lindberg

Richard John Fishbune

Jerrod Kimmel Buterbaugh

Michael Lee Miller

Steven William Steele

Mark Kenneth Hoffmeyer

Patrick Kevin Egan

David J Braun

James Aloysius Hagan

Scott D Strand

Steven Dennis Keidl

John Gregory Stephanie

Thai Quoc Ngo

Charles J Guenther

Brian Joseph Hruby

Nathan Carl Mandelko

Charles J Pentek

Vincent W Ting

Jon Anton Veer

Methods, apparatus, and products for dynamically configuring current sharing and fault monitoring in redundant power supply modules for components of an electrically powered system, including summing, by a master service processor, during powered operation of the system, the present power requirements of components presently installed in the electrically powered system and setting, by the master service processor for each redundant power supply module in dependence upon the sum of the present power requirements, a current sharing tolerance and a fault reporting tolerance.

Dynamically configuring current sharing and fault monitoring in redundant power supply modules

Exemplary embodiments include An active impedance current-sharing circuit including: a power supply in electrical communication with a current sense resistor; a differential amplifier in electrical communication with the current sense resistor; a gate adjust amplifier in electrical communication with the differential amplifier; an ORing MOSFET in electrical communication with the gate adjust amplifier and the current sense resistor; a current share resistor in electrical communication with a current share bus and the gate adjust amplifier; and a current share output in electrical communication with the ORing MOSFET, wherein the circuit allows two or more power supplies that are not designed for current share to be connected in parallel and current share by actively modulating the ORing MOSFET between its linear and fully enhanced regions.

Active impendance current-share method

A method, apparatus and computer program product are provided for implementing power system performance. Power supply system data are processed and a power path in a power supply system having a predefined component failure mode is identified for placement of a fuse. Transient and steady state current levels are determined for each identified power path. A fuse size is selected within an identified fuse size range based upon the determined transient and steady state current levels. A selected fuse energy rating is lower than an energy rating of the solid-state devices in the identified power path.

Method, apparatus and computer program product for implementing enhanced power system with optimized fuse placement and sizing

A power converter controller and a method for controlling a power converter are provided. The power converter includes first and second power transformers, each having first and second primary windings and a secondary winding; and first and second switches that alternately couple primary windings of the first and second power transformers to an input power source. The power converter controller receives a feedback signal, such as a DC power output voltage from the power converter. A voltage controlled oscillator responsive to the feedback signal provides a variable frequency signal. A phase shift controller coupled to the voltage controlled oscillator provides a variable phase shifted signal responsive to the variable frequency signal. Gate drive signals are decoded using the variable frequency signal and variable phase shifted signal for driving first and second switches of the power converter.

Phase and frequency shifted controller for interleaved ZVS forward power converter

An AC transfer switch (ATS) is provided for switching a system load between at least two AC lines. A first bridge rectifier is connected to a first AC line for providing a first full wave rectified AC waveform. A first pair of oppositely poled silicon controlled rectifiers (SCRs) is coupled to the first bridge rectifier and to the system load. A second bridge rectifier is connected to a second AC line for providing a second full wave rectified AC waveform. A second pair of oppositely poled silicon controlled rectifiers (SCRs) coupled to the second bridge rectifier and to the system load. Control logic is coupled to a gate input of the first pair of oppositely poled silicon controlled rectifiers (SCRs) and a gate input of the second pair of oppositely poled silicon controlled rectifiers (SCRs) for applying one of the first full wave rectified AC waveform or the second full wave rectified AC waveform to the system load. The control logic includes a first AC line sense circuit for sensing the first AC line input and a second AC line sense circuit for sensing the second AC line input. A first optical isolator is responsive to an output signal provided by the first AC line sense circuit sensing the first AC line input within a predefined AC line tolerance for activating the gate input of the first pair of oppositely poled silicon controlled rectifiers (SCRs) and applying the first full wave rectified AC waveform to the system load. A second optical isolator is responsive to an output signal provided by the first AC line sense circuit sensing the first AC line input outside the predefined AC line tolerance and an output signal provided by the second AC line sense circuit sensing the second AC line input within the predefined AC line tolerance for activating the gate input of the second pair of oppositely poled silicon controlled rectifiers (SCRs) and applying the second full wave rectified AC waveform to the system load.

AC transfer switch using semiconductor devices

A full-bridge DC-to-DC converter having an unipolar gate drive is disclosed. The full-bridge DC-to-DC converter includes a primary-to-secondary transformer, multiple gate drive circuits, and multiple gate drive transformers. The primary-to-secondary transformer converts a first DC voltage to a second DC voltage under the control of the gate drive circuits. Each of the gate drive circuits includes a first transistor and a second transistor. The gate of the first transistor is connected to a pulse voltage source via a diode. The drain of the second transistor is connected to the source of the first transistor, and the source of the second transistor is connected to the gate of the first transistor via a resistor, for discharging a gate-to-source voltage of the first transistor during the time when a voltage of the pulse voltage source is below a gate-to-source threshold voltage of the first transistor. Coupled to at least two of the gate drive circuits, each of the gate drive transformers controls at least two gate drive circuits.

Full-bridge DC-to-DC converter having an unipolar gate drive

A power supply includes a rectifier which receives alternating current as an input, and which provides an output of direct current pulses at a positive polarity output line thereof with respect to a negative polarity output line thereof. A back-up circuit is coupled between the positive and negative polarity output lines of the rectifier. The back-up circuit includes the series connection of a switching device, a current blocking device, at least one electrical energy source device, and a current measuring device. A circuit protection device may also be provided in the series connection. The back-up circuit can be tested while the rectifier is providing the direct current output pulses by closing the switching device and detecting at least one pulse of a test current flowing through the back-up circuit and/or a terminal voltage of the at least one electrical energy source device during the testing.

Path test for a DC battery back-up system

An electronic load circuit provides a variable load current at a high amp level, at low-voltage so that contemporary voltage supplies of perhaps 1.5V may be tested. This load is used for testing voltage supply circuits for computer systems or the like. A number of parallel, high-current MOS transistors of low internal resistance are used as a constant-current load. Current in the load path is sensed by a sensing resistor connected in series with all of the transistors, and this resistor has a value of the order of the effective internal resistance of the source-to-drain paths of the parallel transistors and connecting links to these transistors via a circuit board, connector terminals, etc. The sensing resistor provides a feedback signal to a high-gain op-amp, the output of which is compared to a variable input signal to produce a gate drive voltage for the transistors. The input signal may be varied to simulate the variable loading exhibited by a computer system. It is important that the current sensing arrangement including the sensing resistor is of low resistance.

Low voltage, high-current electronic load

Disclosed is a circuit board and a process for the manufacture thereof providing a circuit board comprising a metal core having parallel first and second major faces and exhibiting high thermal and electrical conductivity. The circuit board includes electrical insulating layers of thermally conductive, dielectric material applied to the first and second major faces of the metal core. Protecting the dielectric layer and copper conductors is a solder mask layer applied to the dielectric layers and forming outward facing major surfaces. A plurality of insulated and grounded vias having electrically conductive interior rings connecting the major surfaces are provided through the board. Conductive sleeves within the vias are either electrically insulated from the metal core by dielectric material or in electrical contact to the metal core for grounding.

Growing community of inventors

Rochester, MN, United States of America

Timothy Charles Daun-Lindberg