Infineon Technologies Ag

Cree Gmbh

Infineon Technologies Americas Corp.

Timothy Canning

Richard Wilson

Haedong Jang

Frank Trang

Bjoern Herrmann

Bayaner Arigong

David Seebacher

Rongguo Zhou

Zulhazmi Mokhti

Christian Schuberth

An amplifier circuit includes an input port, an output port, and a reference potential port, an RF amplifier device having an input terminal electrically coupled to the input port, an output terminal electrically coupled to the output port, and a reference potential terminal electrically coupled to the reference potential port. An impedance matching network is electrically connected to the output terminal, the reference potential port, and the output port. The impedance matching network includes a reactive efficiency optimization circuit that forms a parallel resonant circuit with a characteristic output impedance of the peaking amplifier at a center frequency of the fundamental frequency range. The impedance matching network includes a reactive frequency selective circuit that negates a phase shift of the RF signal in phase at the center frequency and exhibits a linear transfer characteristic in a baseband frequency range.

RF power amplifier with frequency selective impedance matching network

Embodiments of an RF amplifier package include a body section comprising an upper surface having first and second opposing edge sides, and a die pad vertically recessed beneath the upper surface and comprising first and second opposing sides and a third side intersecting with the first and second sides. Embodiments also include first and second leads disposed on the upper surface, the second lead extending from adjacent to the second side to the second edge side; and a biasing strip connected to the second lead and disposed on the upper surface adjacent to the third side. Other embodiments include packaged RF amplifiers comprising an RF amplifier package, and an RF transistor mounted on the die pad and comprising: a control terminal electrically coupled to the first lead, a reference potential terminal directly facing and electrically connected to the die pad, and an output terminal electrically connected to the second lead.

RF amplifier package with biasing strip

A phase shifter having a four port hybrid coupler is provided. The four port hybrid coupler has first and second input ports and first and second output ports. The four port hybrid coupler is configured to shift the phase of an RF signal as between the first and second input ports. First and second active semiconductor devices are connected to first and second output ports. The first and second active semiconductor devices are configured to change the phase shift of the RF signal as between the first and second input ports based upon a varying voltage.

Reflection type phase shifter with active device tuning

Exemplary impedance matching circuit for an amplifier device comprises a broadband impedance transformer configured to transform, over a fundamental frequency range, an impedance associated with an input port or an output port of the impedance matching circuit; and to transmit RF signals having a fundamental frequency within the fundamental frequency range. The impedance matching circuit also includes a phase shifter circuit configured to transmit, with substantially matched impedance, the RF signals having a fundamental frequency within the fundamental frequency range, and to phase-shift higher-order harmonics of the RF signals. The impedance matching circuit also includes a high-pass impedance transformer configured to match an impedance of the RF signals having a fundamental frequency within the fundamental frequency range; and to transmit, with low reflection, second-order harmonics of the RF signals. Exemplary embodiments also include amplifier circuits comprising an RF amplifier and embodiments of the impedance matching circuit.

Broadband harmonic matching network

An RF package includes a metal flange, an RF input lead, an RF output lead, and an electrically conductive die attach area. An RF transistor that is configured to amplify an RF signal is mounted in the die attach area. The RF transistor includes an input terminal that is electrically coupled to the RF input lead, an output terminal that is electrically coupled to the RF output lead, and a reference potential terminal that is electrically connected to the die attach area. A first capacitor having one or more upper metal plates, and a dielectric region is mounted in the die attach area and is electrically coupled to the RF transmission path of the RF signal. The first capacitor is configured to simultaneously match an impedance of the RF transistor at a fundamental frequency of the RF signal and to filter a higher order harmonic of the fundamental frequency.

RF amplifier with dual frequency response capacitor

A phase shifter includes first and second RF terminals, a reference potential terminal; a lumped element LC network connected to the first and second RF terminals and the reference potential terminal, and first and second active semiconductor devices connected to the lumped element LC network and to the reference potential terminal. Each of the first and second active semiconductor devices include a control terminal and first and second output terminals. The lumped element LC network presents a reactance across the first and second RF terminals that shifts the phase of an RF signal as between the first and second RF terminals. The first and second active semiconductor devices are configured to tune the phase shift of the RF signal by controlling the reactance across the first and second RF terminals.

An RF semiconductor amplifier package includes a flange shaped body section, an electrically conductive die pad centrally located on the body section, and an electrically insulating window frame disposed on an upper surface of the body section. A first electrically conductive lead is disposed on the window frame adjacent to a first side of the die pad and extends away from the first side of the die pad towards a first edge side of the body section. A second electrically conductive lead is disposed on the window frame adjacent to a second side of the die pad and extends away from the second side of the die pad towards a second edge side of the body section. A first electrically conductive biasing strip is disposed on the window frame, continuously connected to the second lead, and extends along and a third side of the die pad.

An amplifier circuit includes an RF amplifier that is configured to amplify an RF signal between a first terminal and a second terminal across an RF frequency range. The amplifier circuit includes a multi-stage impedance matching network having a broadband impedance transformer, a phase shifter, and a high-pass impedance transformer connected in series with one another between a first port of the amplifier circuit and the first terminal. The broadband impedance transformer provides impedance transformation in the RF frequency range. The phase shifter shifts a phase output port reflection coefficient in a second order harmonic frequency range that overlaps with a second order harmonic of the fundamental RF frequency. The high-pass impedance transformer transmits an RF signal in the RF frequency range while providing impedance transformation in the RF frequency range and transmits RF signals in the second order harmonic frequency range with low impedance.

An amplifier circuit includes an RF input port, an RF output port, a reference potential port, and an RF amplifier having an input terminal and a first output terminal. An output impedance matching network electrically couples the first output terminal to the RF output port. A first inductor is electrically connected in series between the first output terminal and the RF output port, a first LC resonator is directly electrically connected between the first output terminal and the reference potential port, and a second LC resonator is directly electrically connected between the first output terminal and the reference potential port. The first LC resonator is configured to compensate for an output capacitance of the RF amplifier at a center frequency of the RF signal. The second LC resonator is configured to compensate for a second order harmonic of the RF signal.

Compact class-F chip and wire matching topology

A power amplifier includes an outphasing amplifier. The outphasing amplifier includes a first amplifier and a second amplifier, and is configured to provide a first amplified RF signal and a second amplified RF signal that is phase shifted from the first amplified RF signal. The power amplifier further includes an output circuit that is configured to combine RF power of the first and second amplified RF signals at a summing node. The output circuit includes a first branch connected between the first amplifier and a summing node and a second branch connected between the second amplifier and the summing node. The first and second branches are each configured to match an output impedance of the first and second amplifiers and to phase shift the first and second amplified RF signals for an outphasing operation using common reactive components for the match of the output impedance and the outphasing operation.

Compact chireix combiner and impedance matching circuit

An amplifier that is configured to amplify an RF signal includes a power combiner circuit. The power combiner circuit includes a first branch connected between a first RF input port and a summing node and a second branch connected between a second RF input port and the summing node. Each of the first and second branches includes an impedance inverter. The Chireix combiner is configured to present a Chireix load modulated impedance response to the first and second RF input ports. The power combiner circuit further includes compensation elements being configured to at least partially compensate for a reactance of the Chireix combiner circuit in a Doherty amplifier mode in which a signal is applied to the first RF input port and the second RF input port is electrically open.

Doherty-Chireix combined amplifier

Embodiments relate to outphasing amplifiers and amplification. One example system includes a signal splitter configured to receive an input signal and output a plurality of signals, wherein the signal splitter shifts each of the plurality of signals by a distinct phase based at least in part on a power of the input signal; a plurality of power amplifiers (PAs), each configured to amplify a distinct signal of the plurality of signals to generate a distinct amplified signal; a plurality of input matching networks, each coupled to a distinct PA of the plurality of PAs and configured to transform an input impedance of the coupled PA to an outphasing load condition based on the distinct signal the coupled PA is configured to amplify; and a combiner configured to combine the plurality of distinct amplified signals to generate an amplified input signal.

Growing community of inventors

Morgan Hill, CA, United States of America

Timothy Canning