Amazon Technologies, Inc.

Elemental Technologies, Inc.

Timothy B Prins

Jeffrey K Lassahn

Yongjun Wu

Avinash Priya Khurana

Khawaja Salman Shams

Methods and apparatus are described for estimating the peak bit rate for content and specifying the BANDWIDTH tag value for HLS content. This disclosure also describes techniques by which live content and VOD content can be stitched together in a way that harmonizes the different requirements for the BANDWIDTH tag for the different types of content.

Computing peak segment bit rate for various content streaming scenarios

Methods, systems, and computer-readable media for minimization of video re-buffering using local animation are disclosed. A client device stores a portion of a video stream into a video buffer and displays the portion on a display. The stream is received from a media streaming system via one or more networks. The client device discontinues displaying the video stream. The client device generates a visualization of metadata that is displayed on the display while the video stream is not displayed. While the visualization of metadata is displayed on the display, the client device stores a newer portion of the video stream in the video buffer. The client device discontinues displaying the visualization of metadata and resumes displaying the video stream on the display.

Minimization of video re-buffering using local animation

A video packaging and origination service can include one or more encoder components that receive content for encoding and transmitting to requesting entities. Responsive to a request for content, an encoder can be configured with a set of adjustable parameters that depend on the specific format of encoding. To implement watermarking, the encoder dynamically modifies or biases one or more of the parameter values such that the modified parameter values can represent watermarking data.

Managing encoding parameters

An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit includes an array of software-configurable general purpose processors, a globally-shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors has access to the globally-shared memory to execute one or more portions of at least one of (i) a decoding program, (ii) an encoding program, and (iii) an encoding and decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a map array describing a position of block data in one or more associated arrays.

Block mapping in high efficiency video coding compliant encoders and decoders

An apparatus includes a central processing unit and a parallel processing unit. The parallel processing unit generally includes an array of software-configurable general purpose processors, a globally shared memory, and a shared memory. Each of the software-configurable general purpose processors in the array of software-configurable general purpose processors generally has access to the globally shared memory to execute one or more portions of a decoding program. The shared memory is accessible by the central processing unit to program the shared memory with a schedule describing which of the one or more portions of the decoding program are to be executed by each of the software-configurable general purpose processors.

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Seattle, WA, United States of America

Timothy B Prins