Micron Technology Incorporated

Micro Technology, Inc.

Timothy A Quick

Eugene P Marsh

Stefan Uhlenbrock

Dan B Millward

Brian A Vaartstra

Sumeet C Pandey

Scott E Sills

John A Smythe

Brenda D Kraus

Chet E Carter

J Neil Greeley

Joseph Neil Greeley

Marko Milojevic

Gurtej S Sandhu

Nishant Sinha

Richard J Hill

Prashant Raghu

Matthew N Rocklein

Shane J Trapp

Byeung Chul Kim

Aaron Michael Lowe

An-Jen B Cheng

Zhuo Chen

Richard Beeler

Lukasz Hupka

Daniel Millward

Some embodiments include dielectric material having a first region containing HfO and having a second region containing ZrO, where the chemical formulas indicate primary constituents rather than specific stoichiometries. The first region contains substantially no Zr, and the second region contains substantially no Hf. Some embodiments include capacitors having a first electrode, a second electrode, and a dielectric material between the first and second electrodes. The dielectric material includes one or more first regions and one or more second regions. The first region(s) contain(s) Hf and substantially no Zr. The second region(s) contain(s) Zr and substantially no Hf. Some embodiments include memory arrays.

Dielectric materials, capacitors and memory arrays

A method of forming a structure comprises forming a pattern of elongate features extending vertically from a base structure. Conductive material is formed on the elongate features. After completing the forming of the pattern of elongate features, the elongate features, the conductive material, or both is (are) exposed to at least one surface treatment gas. The at least one surface treatment gas comprises at least one species formulated to diminish attractive or cohesive forces at a surface of the conductive material. Apparatus and additional methods are also described.

Methods for inhibiting line bending during conductive material deposition, and related apparatus

Some embodiments include an integrated transistor having an active region comprising semiconductor material. A conductive gating structure is adjacent to the active region. The conductive gating structure includes an inner region proximate the active region and includes an outer region distal from the active region. The inner region includes a first material containing titanium and nitrogen, and the outer region includes a metal-containing second material. The second material has a higher conductivity than the first material. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies.

Integrated assemblies and methods of forming integrated assemblies

Methods of forming silicon nitride. Silicon nitride is formed on a substrate by atomic layer deposition at a temperature of less than or equal to about 275&#xb0; C. The as-formed silicon nitride is exposed to a plasma. The silicon nitride may be formed as a portion of silicon nitride and at least one other portion of silicon nitride. The portion of silicon nitride and the at least one other portion of silicon nitride may be exposed to a plasma treatment. Methods of forming a semiconductor structure are also disclosed, as are semiconductor structures and silicon precursors.

Methods of forming silicon nitride including plasma exposure

Methods for fabricating sub-lithographic, nanoscale microstructures utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.

Methods of forming a semiconductor device using block copolymer materials

Apparatus with species on or in conductive material on elongate lines

A silicon chalcogenate precursor comprising the chemical formula of Si(XR)R, where X is sulfur, selenium, or tellurium, Ris hydrogen, an alkyl group, a substituted alkyl group, an alkoxide group, a substituted alkoxide group, an amide group, a substituted amide group, an amine group, a substituted amine group, or a halogen group, each Ris independently hydrogen, an alkyl group, a substituted alkyl group, an alkoxide group, a substituted alkoxide group, an amide group, a substituted amide group, an amine group, a substituted amine group, or a halogen group, and n is 1, 2, 3, or 4. Methods of forming the silicon chalcogenate precursor, methods of forming silicon nitride, and methods of forming a semiconductor structure are also disclosed.

Silicon chalcogenate precursors comprising a chemical formula of si(XR1)nR24-n and methods of forming the silicon chalcogenate precursors

Methods of forming semiconductor devices comprising silicon nitride on high aspect ratio features

A method of forming an apparatus comprises conformally forming a spacer material over and between structures overlying a base structure. A liner material is conformally formed on the spacer material. The spacer material is selectively etchable relative to the liner material through exposure to at least one etchant. Portions of the liner material and the spacer material overlying upper surfaces of the structures and upper surfaces of the base structure horizontally between the structures are selectively removed to form spacer structures flanking side surfaces of the structures. An apparatus and an electronic system are also described.

Methods of forming an apparatus for making semiconductor dieves

Memory cells are disclosed, which cells include a cell material and an ion-source material over the cell material. A discontinuous interfacial material is included between the cell material and the ion-source material. Also disclosed are fabrication methods and semiconductor devices including the disclosed memory cells.

Memory cells, semiconductor devices including the memory cells, and methods of operation

Methods of forming a nanostructured polymer material including block copolymer materials

Memory cells and methods of fabrication

Silicon chalcogenate precursors, methods of forming the silicon chalcogenate precursors, and related methods of forming silicon nitride and semiconductor structures

Methods of forming silicon nitride by atomic layer deposition and methods of forming semiconductor structures

Growing community of inventors

Boise, ID, United States of America

Timothy A Quick