Nxp B.v.

Nexperia B.v.

Tim Boettcher

Roelf Anco Jacob Groenhuis

Thomas Igel-Holtzendorff

Johannes Josephus Theodorus Marinus Donkers

Jan Sonsky

Pompeo V Umali

Andreas Bernardus Maria Jansman

Markus Mueller

Jeroen Antoon Croon

Stephan Heil

Emiel De Bruin

Rolf Brenner

Stephen John Sque

Wai Wong Chow

Sven Walczyk

Reza Behtash

Haibo Fan

Jan Philipp Fischer

Godefridus Adrianus Maria Hurkx

Chi Ho Leung

Shun Tik Yeung

Soenke Habenicht

Steffen Holland

Stefan Berglund

Linpei Zhu

Godefridus Andrianus Maria Hurkx

Various example embodiments concern an integrated circuit (IC) package having a clip with a protruding tough-shaped finger portion. The clip can be used in various IC packages including, for example, soft-soldered compact power packages such as rectifiers with specified surge current capability. Such embodiments can be implemented to allow for a visual inspection capability of the soldering area for connecting a lead frame, via the clip, to a surface of the IC package die, while still providing sufficient thermal mass to limit the temperature increase during forward surge current loads. This results in a simple to manufacture design without compromising too much on performance.

Semiconductor device and method with clip arrangement in IC package

An electronic device including a die and at least one lead. The electronic device further includes a corresponding at least one connector, each connector for connecting the die to a corresponding lead or leads, and each connector having a first end disposed in bondable proximity to a complementary surface of the corresponding lead and a second end disposed in bondable proximity to a complementary surface of the die. An end portion of at least one of the first end and second end has a formation, the formation in combination with the complementary surface of one, or both, of the respective lead or the die defining therebetween a first region and at least a second region configured to attract by capillary action an electrically conductive bonding material to consolidate therein.

Electronic device

A semiconductor device and a method of making the same is provided. The device includes a semiconductor substrate having a major surface and a back surface. The device also includes a bipolar transistor. The bipolar transistor has a collector region located in the semiconductor substrate; a base region located within the collector region and positioned adjacent the major surface; an emitter region located within the base region and positioned adjacent the major surface; and a collector terminal located on the major surface of the semiconductor substrate. The collector terminal includes: a first electrically conductive part electrically connected to the collector region; an electrically resistive part electrically connected to the first electrically conductive part, and a second electrically conductive part for allowing an external electrical connection to be made the collector terminal. The second conductive part is electrically connected to the first conductive part via the resistive part.

Semiconductor device

A semiconductor arrangement comprising a substrate having a first trench formed therein, a field plate layer arranged to extend within the first trench and coat the first trench, the field plate layer having a thickness such that it defines a second trench within the first trench, a barrier layer arranged to coat an internal surface of the second trench; and a trench fill material configured to substantially planarize the first and second trenches.

Semiconductor arrangement

A semiconductive device comprising a body having: a first surface and an opposing second surface; a first semiconductive layer adjacent to the first surface; an active region comprising: a plurality of active trenches in the first surface, extending from the first surface into the first semiconductive layer, and having an active trench width, and a plurality of active cells; and a termination region at a periphery of the first surface comprising: at least one termination trench extending from the first surface into the first semiconductive layer, wherein the termination region has a width that is greater than the active trench width; and a number of termination trench separators having a width that is less than a width of the active cells, wherein the active trenches and the at least one termination trench each comprise a first insulator layer adjacent to the first semiconductive layer of the body.

Semiconductive device and associated method of manufacture

An integrated diode () comprising a substrate (); a Schottky cell () on the substrate (); a heterojunction cell () on the substrate (); a common anode contact () for both the Schottky cell () and the heterojunction cell (); and a common cathode contact () for both the Schottky cell () and the heterojunction cell ().

A diode comprising a reduced surface field effect trench structure, the reduced surface field effect trench structure comprising at least two trenches formed in a substrate and separated from one another by a joining region of the substrate, the joining region comprising an electrical contact and a layer of p-doped semiconductor material.

Diode having a reduced surface field effect trench structure and method of manufacturing a diode having a reduced surface field effect trench structure

There is disclosed a lead for connection to a semiconductor device die, the lead comprising a clip portion. The clip portion comprises a major surface having two or more protrusions extending therefrom for connection to a bond pad of the semiconductor device die.

Lead for connection to a semiconductor device

Disclosed is a semiconductor device comprising a group 13 nitride heterojunction comprising a first layer having a first bandgap and a second layer having a second bandgap, wherein the first layer is located between a substrate and the second layer; and a Schottky electrode and a first further electrode each conductively coupled to a different area of the heterojunction, said Schottky electrode comprising a central region and an edge region, wherein the element comprises a conductive barrier portion located underneath said edge region only of the Schottky electrode for locally increasing the Schottky barrier of the Schottky electrode. A method of manufacturing such a semiconductor device is also disclosed.

Heterojunction semiconductor device and manufacturing method

Disclosed is a discrete semiconductor device package () comprising a semiconductor die () having a first surface and a second surface opposite said first surface carrying a contact (); a conductive body () on said contact; an encapsulation material () laterally encapsulating said conductive body; and a capping member () such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap () may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

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Lauenbrueck, Germany

Tim Boettcher