Infineon Technologies Ag

Globalfoundries Inc.

Qimonda Ag

Infineon Technologies Austria Ag

Infineon Technologies Dresden Gmbh

Infineon Technologies Dresden Gmbh & Co . Kg

International Business Machines Corporation

Infineon Ag

Till Schloesser

Andreas Peter Meiser

Peter Baars

Rolf Weis

Franz Hirler

Frank Jakubowski

Franz Hofmann

Martin Poelzl

Dirk Manger

Ulrike Gruening-von Schwerin

Markus Zundel

Richard Johannes Luyken

Martin Popp

Marc Strasser

Detlef Weber

Karl-Heinz Gebhardt

Thorsten Meyer

Bernd Goebel

Peter Moll

Joachim Nuetzel

Wolfgang Mueller

Anton Mauder

Wolfgang Werner

Stefan Kolb

Lothar Risch

Wolfgang Bergner

Wolfgang Roesner

Martin Henning Vielemeyer

Hans-Peter Moll

Valentin Rosskopf

Andreas Felber

Odo Wunnicke

Juergen Lindolf

Peng-Fei Wang

Bernhard Kowalski

Hans-Joachim Schulze

Jack Allan Mandelman

Carl John Radens

Ramachandra Divakaruni

Ralf Siemieniec

Josef Willer

Andy C Wei

Helmut Horst Tews

Helmut Schneider

Gary Bela Bronner

Ulrike Gruening

Franz Kreupl

Dominique Savignac

Rainald Sander

Larry Alan Nesbit

Stephan Kudelka

Siegfried Schwarzl

Christoph Kadow

Ingo Muri

Michael Specht

Matthias Schaller

Dirk Ahlers

Hermann Gruber

Richard Carter

Dietmar Gogl

Olaf Storbeck

Klaus Muemmler

Alexander Michaelis

Thomas Gross

Ralf Rudolf

Christian Kampen

Kristin Schupke

Florian Schnabel

Stefan Slesazeck

Vivien Schroeder

Markus Rochel

Johannes Heitmann

Wolfgang Henke

Ulrike Gruening Von Schwerin

Johann Harter

Karoline Koepp

Hannes Luyken

Ulrike Grüning Von Schwerin

Grzegorz Kozlowski

Srivatsa Kundalgurki

Dirk Baumann

Stefan Wurn

A transistor device is provided. In an example, the transistor device includes a semiconductor body having a first main surface, a second main surface opposite to the first main surface. The transistor device further includes a transistor cell array including a plurality of transistor cells. The transistor cell array includes a first load electrode over the first main surface. The first load electrode is electrically connected to the plurality of transistor cells. The transistor cell array further includes a second load electrode over the second main surface. The second load electrode is electrically connected to the plurality of transistor cells. The plurality of transistor cells includes at least one control electrode including carbon.

Transistor device and method of manufacturing

A method of manufacturing a semiconductor device includes: forming a trench in a first side of a semiconductor layer, the semiconductor layer including a drift zone of a first conductivity; forming a drain region of the first conductivity type in the first side of the semiconductor layer and laterally adjoining the drift zone; forming a body region of a second conductivity type opposite the first conductivity type and laterally adjoining the drift zone at a side of the drift zone opposite the drain region; and forming source regions of the first conductivity type and body contact regions of the second conductivity type in a sidewall of the trench and arranged in an alternating manner along a length of the trench, using a dopant diffusion process which includes diffusing dopants of both conductivity types from oppositely-doped dopant source layers which are in contact with different regions of the sidewall.

Lateral trench transistor device

The disclosure relates to a semiconductor device, including a semiconductor substrate of a first conductivity type and a semiconductor layer of a second conductivity type on the semiconductor substrate, the second conductivity type being different than the first conductivity type. The semiconductor device also includes an isolation structure electrically isolating a first region of the semiconductor layer from a second region of the semiconductor layer. A shallow trench isolation structure vertically extends from a surface of the semiconductor layer into the first region of the semiconductor layer. An electrical resistor is formed on the shallow trench isolation structure.

Semiconductor device with electrical resistor

A method for producing a semiconductor component includes: providing a semiconductor body having a first dopant of a first conductivity type; forming a first trench in the semiconductor body starting from a first side; filling the first trench with a semiconductor filler material; forming a superjunction structure by introducing a second dopant of a second conductivity type into the semiconductor body, the semiconductor filler material being doped with the second dopant; forming a second trench in the semiconductor body starting from the first side; and forming a trench structure in the second trench.

Method for producing a semiconductor component

A method includes: forming first and second trenches in a semiconductor body; forming a first material layer on the semiconductor body in the first and second trenches such that a first residual trench remains in the first trench and a second residual trench remains in the second trench; removing the first material from the second trench; and forming a second material layer on the first material layer in the first residual trench and on the semiconductor body in the second trench. The first material layer includes dopants of a first doping type and the second material layer includes dopants of a second doping type. The method further includes diffusing dopants from the first material layer in the first trench into the semiconductor body to form a first doped region, and from the second material layer in the second trench into the semiconductor body to form a second doped region.

Method for forming complementary doped semiconductor regions in a semiconductor body

The disclosure relates to a method for producing a semiconductor device. The method includes providing a semiconductor body having first dopants of a first conductivity type and second dopants of a second conductivity type. The method also includes forming a first trench in the semiconductor body via a first mask, and filling the first trench with a semiconductor filling material. The method further includes forming a superjunction structure by introducing a portion of the first dopants from a region of the semiconductor body into the semiconductor filling material, forming a second trench in the semiconductor body via a second mask, which is formed in a manner self-aligned with respect to the first mask, and forming a trench structure in the second trench.

Method for producing a semiconductor device having a superjunction structure, first and second trenches and a trench structure in the second trench

A semiconductor device includes a first transistor and a second transistor in a semiconductor substrate. The first transistor includes a first drain contact electrically connected to a first drain region, the first drain contact including a first drain contact portion and a second drain contact portion. The first drain contact portion includes a drain conductive material in direct contact with the first drain region. The second transistor includes a second source contact electrically connected to a second source region. The second source contact includes a first source contact portion and a second source contact portion. The first source contact portion includes a source conductive material in direct contact with the second source region.

Semiconductor device comprising a first transistor and a second transistor

A semiconductor device includes a transistor in a semiconductor substrate. The transistor includes a drift zone of a first conductivity type adjacent to a drain region, and a first field plate and a second field plate adjacent to the drift zone. The second field plate is arranged between the first field plate and the drain region. The second field plate is electrically connected to a contact portion arranged in the drift zone. The transistor further includes an intermediate portion of the first conductivity type at a lower doping concentration than the drift zone. A distance between the intermediate portion and the drain region is smaller than the distance between the contact portion and the drain region.

Semiconductor device comprising a transistor including a first field plate and a second field plate

A switch comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region, the gate electrode being configured to control a conductivity of a channel formed in the body region. The gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction. The body region is adjacent to the source region and the drain region. The switch further comprises a source contact and a body contact portion, the source contact being electrically connected to a source terminal. The body contact portion is in contact with the source contact and is electrically connected to the body region.

Switch comprising a field effect transistor and integrated circuit

An electric circuit includes a semiconductor device. The semiconductor device includes a first transistor and a second transistor in a common semiconductor substrate. The first transistor is of the same conductivity type as the second transistor. A first source region of the first transistor is electrically connected to a first source terminal via a first main surface of the semiconductor substrate. A second drain region of the second transistor is electrically connected to a second drain terminal via a first main surface of the semiconductor substrate. A first drain region of the first transistor and a second source region of the second transistor are electrically connected to an output terminal via a second main surface of the semiconductor substrate. The electric circuit further includes a control circuit operable to control a first gate electrode of the first transistor and a second gate electrode of the second transistor.

Electric circuit including a semiconductor device with a first transistor, a second transistor and a control circuit

A semiconductor device in a semiconductor substrate having a first main surface includes a transistor array and a termination region. The transistor array includes a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The gate electrode is configured to control a conductivity of a channel in the body region. The body region and the drift zone are disposed along a first horizontal direction between the source region and the drain region. The transistor array further includes first field plate trenches in the drift zone. A longitudinal axis of the first field plate trenches extends in the first horizontal direction. The semiconductor device further includes a second field plate trench, a longitudinal axis of the second field plate trench extending in a second horizontal direction perpendicular to the first direction.

Power transistor having perpendicularly-arranged field plates and method of manufacturing the same

A semiconductor device and a method of manufacturing the same is provided. The semiconductor device including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.

Semiconductor device comprising a transistor cell including a source contact in a trench, method for manufacturing the semiconductor device and integrated circuit

A semiconductor device includes a transistor in a semiconductor substrate having a main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, a gate electrode, and a gate dielectric adjacent to the gate electrode. The gate electrode is disposed adjacent to at least two sides of the channel region. The channel region and the drift zone are disposed along a first direction parallel to the main surface between the source region and the drain region. The gate dielectric has a thickness that varies at different positions of the gate electrode.

Semiconductor device including a transistor with a gate dielectric having a variable thickness

A method for producing a MEMS device comprises forming a semiconductor layer stack, the semiconductor layer stack comprising at least a first monocrystalline semiconductor layer, a second monocrystalline semiconductor layer and a third monocrystalline semiconductor layer, the second monocrystalline semiconductor layer formed between the first and third monocrystalline semiconductor layers. A semiconductor material of the second monocrystalline semiconductor layer is different from semiconductor materials of the first and third monocrystalline semiconductor layers. After forming the semiconductor layer stack, at least a portion of each of the first and third monocrystalline semiconductor layers is concurrently etched.

MEMS device and method for manufacturing a MEMS device

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Munich, Germany

Till Schloesser