Commissariat a L'energie Atomique Et Aux Energies Alternatives

Centre National De La Recherche Scientifique

Université´ D'aix-marseille

Tifenn Hirtzlin

Elisa Vianello

Jean-Michel Portal

François Rummens

Michele Martemucci

Djohan Bonnet

Eduardo Esmanhotto

A data storage circuit includes a first memory array comprising a plurality of FeRAM memory units; a second memory array comprising a plurality of OxRAM memory units; each of the first and second memory arrays comprising: a plurality of word lines, a plurality of source lines and a plurality of bit lines; for each column each memory unit comprising: a memory cell having a first electrode and a second electrode connected to the source line associated to the memory unit; a selection transistor having a gate connected to the word line associated to the memory unit and placed in series with the memory cell between the source line and a bit line associated to of the memory unit; the data storage circuit comprising further: a data transfer stage configured to transfer data from a set of source FeRAM memory units having a common bit line to a target OxRAM unit by converting a read signal from the common bit line to a transfer voltage applied on a target line of the target OxRAM unit; the target line corresponding to the word line or the source line and having the same direction as the common bit line.

Hybrid FeRAM/OxRAM data storage circuit

A memory cell, includes first and second main terminals, an auxiliary terminal; M memristor(s) between the main terminals, M≥1; M primary switch(es), each in parallel with a memristor; and a secondary switch between the second main terminal and the auxiliary terminal. It is configured for writing to at least one memristor by opening each primary switch in parallel with the at least one memristor, closing each other primary switch, closing the secondary switch and applying a corresponding programming voltage between the first main terminal and the auxiliary terminal; and for reading at least one memristor by opening each primary switch in parallel with the at least one memristor, closing each other possible primary switch, opening the secondary switch and measuring a corresponding electrical quantity between the main terminals.

Memory cell, electronic circuit comprising such cells, related programming method and multiplication and accumulation method

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Grenoble, France

Tifenn Hirtzlin