Mediatek Singapore Pte. Ltd.

Xueshan Technologies Inc.

Tieng Ying Choke

Yuan Sun

Osama K A Shana'a

Chin-Heng Leow

Jun-Wei Lin

Eng-Chuan Low

Hon Cheong Hor

Uday Dasgupta

Chun Geik Tan

Huajiang Zhang

Chong Yong Huang

Wee-Liang Lien

Ying Chow Tan

Junmin Cao

Renliang Zheng

Hong Cheong Hor

A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately &#x3c0;/2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.

Circuits for amplitude demodulation and related methods

Circuits and methods for active load modulation is described. These circuits and methods may be employed in connection with near field communication (NFC) systems, for example in the proximity inductive coupling card (PICC). The methods described herein may be used to synchronize the operations of the system to the carrier clock provided by a reader with typical operation frequency of 13.56 MHz&#xb1;7 KHz. The synchronization may be performed by locking an internal clock to the carrier clock when the transmission of data is disabled, by locking the internal clock to a local clock when data transmission is enabled, and by compensating the phase or frequency of the active load modulation clock to track the carrier clock.

High-speed circuits for active load modulation and related methods

A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK), such that information is encoded in the amplitude of the signals. The circuit may comprise an amplitude detector for extracting the envelope of a received amplitude-modulated signal, a phase/frequency detector for detecting phase and/or frequency shifts, and a selector configured to select one between the output of the amplitude detector and the output of the phase/frequency detector. The selector may be controlled by a control circuit including a delay unit.

Amplitude demodulators and related methods

An envelope extracting apparatus includes: a clock extracting device arranged to extract a clock signal of a receiving modulation signal according to a first biasing voltage; and an edge detecting device arranged to generate a detecting signal to indicate an envelope edge of the receiving modulation signal according to a delayed clock signal of the clock signal and a second biasing voltage; wherein the second biasing voltage or a delay time of the clock signal is adjustable.

Adaptive envelope extracting apparatus, signal decoding apparatus and short-distance contactless communication apparatus applying the adaptive envelope extracting apparatus, and method thereof

An envelope extracting apparatus includes: a clock extracting device arranged to extract a clock signal of a receiving modulation signal according to a first biasing voltage; and an edge detecting device arranged to generate a detecting signal to indicate an envelope edge of the receiving modulation signal according to a delayed clock signal of the clock signal and a second biasing voltage.

A method for testing an Integrated Circuit (IC) with Near Field Communication (NFC) technology according to a first embodiment of the present invention includes: utilizing a BB modem of the IC to generate a known data pattern; modulating the known data pattern to generate a modulated data pattern; sending the modulated data pattern on the transmitting path to an NFC antenna of the IC and utilizing the NFC antenna to loop the modulated data pattern back to the receiving path; demodulating the modulated data pattern; and determining if the data pattern on the transmitting path is the same as the data pattern on the receiving path. When the data pattern on the transmitting path is not the same as the data pattern on the receiving path, it is determined that the IC fails.

Loop back scheme for NFC

A proximity sensing method employed by a wireless communications device includes the steps of: performing a first predetermined operation to detect a presence of at least a transponder in the proximity of the wireless communications device; when the presence of a transponder in the proximity of the wireless communications device is not detected by the first predetermined operation, performing a second predetermined operation to obtain a first characteristic value and after a period of time, performing the second predetermined operation to obtain a second characteristic value sequentially; checking if the first characteristic value and the second characteristic value satisfy a predetermined criteria; and when the predetermined criterion is satisfied, performing the first predetermined operation again to check the presence of the transponder in the proximity of the wireless communications device.

Proximity sensing method using loopback mechanism and wireless communications device thereof

A method for controlling a modulation index of a near field communication (NFC) device includes: in a calibration mode of the NFC device, coupling a receiver of the NFC device to a transmitter of the NFC device to form a probing path between the receiver and the transmitter; and in the calibration mode of the NFC device, adjusting at least one portion of a plurality of modulation parameters corresponding to the modulation index according to probed results of outputs of the transmitter, in order to calibrate the modulation index, for use of transmitting through the transmitter in a normal mode of the NFC device. An associated apparatus is also provided.

Method for controlling a modulation index of a near field communication device with aid of dynamic calibration, and associated apparatus

A phase lock loop having a lock detector is provided. The lock detector is based on a replica charge pump and includes: a charge pump, a filter and a comparing circuit. The charge pump is arranged for providing an output according to a phase difference between an output signal and a reference signal. The filter is coupled to the charge pump, and is arranged for filtering the output of the charge pump to generate a filtered output voltage. The comparing circuit is coupled to the filter, and is arranged for comparing the filtered output voltage with a threshold setting to generate a lock indication signal to indicate whether the output signal is locked to the reference signal.

Lock detector based on charge pump

A method for controlling a modulation index of a near field communication (NFC) device includes: in a calibration mode of the NFC device, temporarily coupling a receiver of the NFC device to a transmitter of the NFC device to form a probing path between the receiver and the transmitter; and in the calibration mode of the NFC device, dynamically adjusting at least one portion of a plurality of modulation parameters corresponding to the modulation index according to probed results of outputs of the transmitter, in order to calibrate the modulation index, for use of transmitting through the transmitter in a normal mode of the NFC device. An associated apparatus is also provided.

A reconfigurable circuit is disclosed. The reconfigurable circuit comprises a pause detector mechanism, a clock extractor, and a multiplexer. The multiplexer is configured to receive a reference clock and is coupled to the clock extractor to receive a clock extracted from a carrier of a near field communication (NFC) field. The reconfigurable circuit also comprises a phase locked loop (PLL) coupled to the pause detector mechanism and the multiplexer, and the PLL can be configured in a first mode to be locked to the reference clock, in a second mode to be locked to the extracted clock, and in a third mode wherein the PLL can switch between being locked to the reference clock and being locked to the extracted clock.

Method and system for fast synchronized dynamic switching of a reconfigurable phase locked loop (PLL) for near field communications (NFC) peer to peer (P2P) active communications

A differential ring oscillator includes a plurality of delay stages connected in a ring. At least one of the delay stages includes: a current source, arranged to generate a bias current according to a coarse tuning signal; a latching circuit arranged to generate a differential output signal to a next delay stage according to a differential input signal from a previous delay stage; a capacitive array arranged to provide a first capacitance according to a fine tuning signal; and a varactor device arranged to provide a second capacitance according to a controllable signal for locking an oscillating frequency of the differential ring oscillator to a target frequency. The coarse tuning signal and fine tuning signal are arranged for adjusting the oscillating frequency of the differential ring oscillator to, respectively, reach a predetermined frequency range including the target frequency and to approach the target frequency in the predetermined frequency range.

Growing community of inventors

Singapore, Singapore

Tieng Ying Choke