Globalfoundries Inc.

Tien-Ying Luo

Haiting Wang

Feng Zhou

Jin Ping Liu

Seung Yeon Kim

Wei Hua Tong

Yan Ping Shen

Haoran Shi

Min-Hwa Chi

Yong Meng Lee

Jun Lian

Guillaume Bouche

Andy C Wei

Dae Geun Yang

Jing Wan

Lun Zhao

Mariappan Hariharaputhiran

Jean-Baptiste Laloe

Churamani Gaire

Isabelle Ferain

Padmaja Nagaiah

Fin-type transistor fabrication methods and structures are provided having one or more nitrided conformal layers, to improve reliability of the semiconductor device. The method includes, for example, providing at least one material layer disposed, in part, conformally over a fin extending above a substrate, the material layer(s) including a gate dielectric layer; and performing a conformal nitridation process over an exposed surface of the material layer(s), the conformal nitridation process forming an exposed, conformal nitrided surface.

Conformal nitridation of one or more fin-type transistor layers

An improved method for fabricating a semiconductor device is provided. The method includes: depositing a dielectric layer on a substrate; depositing a first cap layer on the dielectric layer; depositing an etch stop layer on the dielectric layer; and depositing a dummy cap layer on the etch stop layer to form a partial gate structure. Also provided is a partially formed semiconductor device. The partially formed semiconductor device includes: a substrate; a dielectric layer on the substrate; a first cap layer on the dielectric layer; an etch stop layer on the dielectric layer; and a dummy cap layer on the etch stop layer forming a partial gate structure.

Depositing an etch stop layer before a dummy cap layer to improve gate performance

A method includes forming a gate structure by growing an interfacial layer on a substrate, depositing a High K layer on the interfacial layer, depositing a TiN Cap on the High K layer and forming a thin barrier layer on the TiN Cap. The gate structure is annealed.

Forming a gate by depositing a thin barrier layer on a titanium nitride cap

Devices and methods for forming semiconductor devices with FinFETs are provided. One method includes, for instance: obtaining an intermediate semiconductor device with a substrate and at least one shallow trench isolation region; depositing a hard mask layer over the intermediate semiconductor device; etching the hard mask layer to form at least one fin hard mask; and depositing at least one sacrificial gate structure over the at least one fin hard mask and at least a portion of the substrate. One intermediate semiconductor device includes, for instance: a substrate with at least one shallow trench isolation region; at least one fin hard mask over the substrate; at least one sacrificial gate structure over the at least one fin hard mask; at least one spacer disposed on the at least one sacrificial gate structure; and at least one pFET region and at least one nFET region grown into the substrate.

Devices and methods of forming finFETs with self aligned fin formation

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Clifton Park, NY, United States of America

Tien-Ying Luo