Sandisk Technologies Inc.

Apple Inc.

Western Digital Technologies, Inc.

Sandisk Corporation

Tien-Chien Kuo

Ivan Knez

Chun-Yao Huang

Kanghoon Jeon

Bilin Wang

Yingda Dong

Man Lung Mui

Yingkan Lin

Eran Sharon

Idan Alrod

Jian Feng Chen

Sergey Anatolievich Gorobets

Stanley Bo-Ting Wang

Alex Mak

Jose Antonio Dominguez-Caballero

Gerrit Jan Hemink

Jun Wan

Derek Keith Shaeffer

Yan Li

Alexander Bazarsky

Hopil Bae

Ching-Huang Lu

Liang Pang

Jack Frayer

Julian Vlaiko

Loc Tu

Long C Pham

Pao-Ling Koh

Jonathan Hsu

Juan Lee

Yee Lih Koh

Nimrod Hermesh

Masaaki Higashitani

Deepanshu Dutta

Jayavel Pachamuthu

Feng Q Pan

Steven Theodore Sprouse

Seungpil Lee

Abhijeet Manohar

Daniel Edward Tuers

Toru Miwa

Hao Nguyen

Bo Lei

Hua-Ling Cynthia Hsu

Bo Liu

Jonathan Huynh

Yuki Mizutani

Chris Nga Yee Avila

Jagdish Sabde

Jongmin Park

Sagar Magia

Mitchell Herman Kline

Alexander Kwok-Tung Mak

Jong Hak Yuh

Sung-En Wang

Chen Chen

Manabu Sakai

Khanh T Nguyen

Syed Farhan Mohiuddin

Victor Avila

Denis M Darmon

A pixel circuit for an electronic display may include a memory to store a digital data signal indicative of a value within a data range. The pixel circuit may also include a light-emitting diode to emit light based at least in part on the digital data signal. The pixel circuit may also include an initialization transistor to initialize the pixel circuit before the light-emitting diode emits light and a driving transistor to activate based at least in part on the digital data signal.

Pixel circuitry and operation for memory-containing electronic display

A display system may include a memory external to a pixel that stores a first digital data value, a memory internal to the pixel that stores a second digital data signal, where a combination of the first digital data signal and the second digital data signal may indicate a target gray level assigned to the pixel for a particular image frame. The pixel may be driven for a first duration of time according to the first digital data signal and for a second duration of time according to the second digital data signal.

Dual-memory driving of an electronic display

An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.

Correction for defective memory of a memory-in-pixel display

A data storage device includes a memory device and a controller coupled to the memory device. The controller is configured to receive a command, such as from a host device, to write data to the memory device, perform toggle mode (TM) encoding on the data, and send the TM encoded data to the memory device. The memory device is configured to receive the TM encoded data, decode the TM encoded data, and write the decoded data to a location within the memory device. The memory device is further configured to receive a read command to read data from a location within the memory device, read the data, TM encode the data, and send the TM encoded data to the controller. The controller is configured to receive and decode the TM encoded data, and send the decoded data to a host device.

Toggle mode (&#x2122;) coding with circuit bounded array memory

A storage apparatus includes non-volatile memory cells formed on a memory die, each memory cell configured to hold bits of data, and a control circuit formed on the memory die. The control circuit is configured to calculate parity data for data to be stored in the memory cells and program the memory cells to first distributions. The control circuit is also configured to read the memory cells in the first distributions, recover the data from results of reading the memory cells in the first distributions combined with the parity data, and further program the memory cells from the first distributions to second distributions to store the data. In some cases, the recovered data may have a high bit error rate. To handle higher bit error rates, the use of soft bit data is incorporated into an encoded foggy-fine scheme.

Nonvolatile memory with encoding for foggy-fine programming with soft bits

A storage apparatus includes non-volatile memory cells formed on a memory die, each memory cell configured to hold bits of data, and a control circuit. The control circuit is configured to calculate parity data for data to be stored in the memory cells and program the memory cells to first distributions. The control circuit is also configured to read memory cells in the first distributions, recover the data from results of reading the memory cells in the first distributions combined with the parity data, and further program the memory cells from the first distributions to second distributions to store the data. To improve the accuracy of recovering the encoded foggy phase data, techniques are presented to calibrate the voltage levels used in sensing the foggy state distributions.

Read threshold calibration for nonvolatile memory with encoded foggy-fine programming

Toggle mode (TM) coding with circuit bounded array memory

Efficiently transmitting image data to an electronic display may be provided by skipping regions of the electronic display that display a default value. The electronic display may include a number of pixels, a row driver, and a data driver. The row driver may activate a first subset of the pixels for programming. The data driver may program a default pixel value to respective pixels of the first subset of the pixels for which image data has not been received and may program image data to respective pixels of the first subset of the pixels for which image data has been received.

Image data skipping for transmission to electronic display

An electronic display may include an active area having a first pixel formed in the active area, where the first pixel emits light in response to image data. The electronic display may also include a controller to transmit the image data to the first pixel. The first pixel may include an organic light-emitting diode that emits the light in response to the image data, memory to digitally store the image data received from the controller, and driver circuitry to receive the image data from the memory. The driver circuitry may cause the organic light-emitting diode to emit the light in response to the image data.

Memory-in-pixel architecture

An electronic display may include a memory formed in an active area of the electronic display or formed in integrated circuitry of the electronic display that is outside of the active area. The memory may store a digital data signal indicative of a value within a data range. The electronic display may include a driver disposed in the active area, where the driver may generate one or more analog electrical signals in response to the digital data signal. The electronic display may also include a light-modulating device disposed on the active area, where the light-modulating device may emit light based at least in part on the one or more analog electrical signals.

Systems and methods for memory circuitry in an electronic display

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Sunnyvale, CA, United States of America

Tien-Chien Kuo