Other

Rgb Spectrum

Selka Elektronik Ve Internet Urunleri San.ve Tic.a.s

Tibet Mimar

Lynton Auld

Scott Norder

Disclosed herein are systems, methods, and devices for seamless switching between multiple source streams. Systems include a transmitter that includes encoders configured to generate and encode media streams for transmission. Systems also include a receiver configured to receive the media streams. The receiver includes decoders configured to receive and decode the media streams for display at a display unit. The systems may also include a buffer configured to buffer at least some of the media streams, the streams including at least one primary media stream and at least one secondary media stream, the buffer being configured to provide the a primary media stream to a decoder, and the buffer being further configured to buffer and discard the a secondary media stream. The systems also include a controller configured to switch the buffer to provide a secondary media stream to a decoder responsive to identifying a request for a switch event.

Systems, methods, and devices for seamless switching between multiple source streams

The present invention relates to a vehicle telematics device with one or more cameras embedded in the same package for evidentiary surround audio-video recording, automatic accident detection and emergency help request notification, facial processing for drowsiness and distraction accident avoidance, and embedded multiple profiles of driver analytics, and mobile internet connectivity for contacting emergency services directly and without the delay of a call center and for mobile hot spot for in-vehicle infotainment. Each profile of driver analytics has many selectable advanced driver analysis parameters and multiple profiles can be active for a given driver. In case of emergency help request accident panoramic accident video is uploaded to a cloud drop box and link to video of accident is available along with severity index, location, nearest address, number of passengers, etc.

Vehicle security with accident notification and embedded driver analytics

The present invention relates to a vehicle telematics device for driver monitoring for accident avoidance for drowsiness and distraction conditions. The distraction and drowsiness is detected by facial processing of driver's face and pose tracking as a function of speed and maximum allowed travel distance, and issuing a driver alert when a drowsiness or distraction condition is detected. The mitigation includes audible alert, as well as other methods such as dim blue night to perk up the driver. Adaptation center of driver's gaze direction and allowed maximum time for a given driver and camera angle offset as well as temporary offset for cornering for shift of vanishing point and other conditions is also performed.

Driver distraction and drowsiness warning and sleepiness reduction for accident avoidance

A networked surveillance audio-video recorder for security applications with local storage and continuous record loop using high-definition video and encrypted data is described. Evidentiary audio-video is locally stored on a non-volatile storage media, and later transmitted in accordance with channel bandwidth with optional temporal, spatial or peak signal-to-noise ratio (PSNR) scalability and in accordance to display capabilities of target viewing device upon request of time regions of interest or window around alarm trigger events, or for periodic archival reasons.

Networked security camera with local storage and continuous recording loop

An internet connected mobile security system for recording at least one audio and video on a removable semiconductor storage media in a continuous record loop for evidentiary documentation purposes inside an automotive vehicle or as a wearable video recording device is described.

Mobile security audio-video recorder with local storage and continuous recording loop

The present invention relates to a efficient implementation of integer and fractional 8-length or 4-length, or 8&#xd7;8 or 4&#xd7;4 DCT in a SIMD processor as part of MPEG and other video compression standards.

Apparatus for efficient DCT calculations in a SIMD programmable processor

The present invention provides histogram calculation for images and video applications using a SIMD and VLIW processor with vector Look-Up Table (LUT) operations. This provides a speed up of histogram calculation by a factor of N times over a scalar processor where the SIMD processor could perform N LUT operations per instruction. Histogram operation is partitioned into a vector LUT operation, followed by vector increment, vector LUT update, and at the end by reduction of vector histogram components. The present invention could be used for intensity, RGBA, YUV, and other type of multi-component images.

Parallel histogram generation in SIMD processor by indexing LUTs with vector data element values

The new system provides for efficient implementation of matrix multiplication in a SIMD processor. The new system provides ability to map any element of a source vector register to be paired with any element of a second source vector register for vector operations, and specifically vector multiply and vector-multiply-accumulate operations to implement a variety of matrix multiplications without the additional permute or data re-ordering instructions. Operations such as DCT and Color-space transformations for video processing could be very efficiently implemented using this system.

Method and system for efficient matrix multiplication in a SIMD processor architecture

The present invention provides an efficient method to implement nested if-then-else conditional statements in a SIMD processor, which requires only one vector compare instruction for both if and else parts of the conditional construct. No stack and stack-handling instructions are needed for vector condition codes. Two condition code flag bits representing if and else parts of testing per element provide for nesting of multiple if-then-else. All SIMD instructions are conditional including the vector compare instruction, and this provides a method for aggregating multiple conditions in nested if-then-else statements. M full levels of if-then-else nesting requires (2&#x2212;1) nodes or vector test instructions and 2condition code flags per vector element. Also, capability to compare any element of first source vector register with any element of second source vector is provided.

Efficient handling of vector high-level language conditional constructs in a SIMD processor

A media processor for performing audio, video, and system layer tasks on a fully programmable single-chip integrated processor chip. The present invention performs video compression/decompression, audio compression/decompression, video input and output scaling, video input and output processing for enhancement, and system layer functions. The media processor is a single IC semiconductor chip that is coupled to one or more memory chips, audio front-end chip, and optional I/O interface chips. The media processor is compromised of the following integrated on a single IC semiconductor: Video processor with a SIMD vector engine, audio processor, stream processor, system (host) processor, and video scalers, LUTs and hardware blender.

Audio and video processing apparatus

Histogram generation with vector operations in SIMD and VLIW processor by consolidating LUTs storing parallel update incremented count values for vector data elements

The apparatus provides for efficient implementation of multiple-bit leap-forward LFSRu calculation in a SIMD processor. This provides an accelerated and programmable way to implement LFSR calculations in a SAID processor. Conditional vector exclusive-OR accumulation is used by manipulating the leap-forward matrix, whereby one conditional vector exclusive-OR operation is performed for each column and partial results are accumulated. For an N-wide SIMD this results in close to N times acceleration of leap-forward LFSR calculation without additional resources or dedicated logic.

Apparatus for efficient LFSR calculation in a SIMD processor

The present invention provides a 16&#xd7;16-sliding window using vector register file with zero overhead for horizontal or vertical shifts to incorporate motion estimation into SIMD vector processor architecture. SIMD processor's vector load mechanism, vector register file with shifting of elements capability, and 16&#xd7;16 parallel SAD calculation hardware and instruction are used. Vertical shifts of all sixteen-vector registers occur in a ripple-through fashion when the end vector register is loaded. The parallel SAD calculation hardware can calculate one 16-by-16-block match per clock cycle in a pipelined fashion. In addition, hardware for best-match SAD value comparisons and maintaining their pixel location reduces the software overhead. Block matching for less than 16 by 16 block areas is supported using a mask register to mask selected elements, thereby reducing search area to any block size less than 16 by 16.

Method for programmable motion estimation in a SIMD processor

The present invention provides efficient ways to implement scan conversion and matrix transpose operations using vector multiplex operations in a SIMD processor. The present method provides a very fast and flexible way to implement different scan conversions, such as zigzag conversion, and matrix transpose for 2&#xd7;2, 4&#xd7;4, 8&#xd7;8 blocks commonly used by all video compression and decompression algorithms.

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Sunnyvale, CA, United States of America

Tibet Mimar