Broadcom Corporation

Tianwei Li

Jiangfeng Wu

Ramon Alejandro Gomez

Chun-Ying Chen

Rong Wu

Wei-Ta Shih

Kevin Lee Miller

Lin He

Young J Shin

Randall Bret Perlow

Massimo Brandolini

Arnoldus Venes

Binning Chen

Chia-Jen Hsu

Tao Wang

Hans Eberhart

Wenbo Liu

Karthik Raviprakash

An analog-to-digital converter (ADC) is used for dynamic tracking nonlinearity correction. The correction employs an analog sampling technique to determine the signal derivative by measuring the derivative current arising from sampling an analog input signal undergoing analog-to-digital conversion, at the sampling instant. The analog derivative sampling technique achieves significant reduction in power consumption with less complexity compared with a digital approach, with strong improvements in HD, SDFR, and IMmeasures.

Dynamic tracking nonlinearity correction

An Analog to Digital Converter (ADC) includes an ADC core, a first switched capacitor voltage regulator, and a second switched capacitor voltage regulator. The ADC core includes a plurality of digital components that sample an incoming signal based on an ADC clock, a first voltage, and a first ground and a plurality of analog components configured to operate using a second voltage and a second ground. The first switched capacitor voltage regulator produces the first voltage and the first ground for the plurality of digital components using a supply voltage, a supply ground, and the ADC clock. The second switched capacitor voltage regulator produces the second voltage and the second ground using the supply voltage, the supply ground, and the ADC clock. Switching of the first and second switched capacitor voltage regulators is performed using complementary and non-overlapping clocks having switching frequency that is based upon the ADC clock.

Analog to digital converter having switched capacitor power supply

A system includes a pipeline analog-to-digital converter as a first stage to process an input signal, and a successive approximation register (SAR) analog-to-digital converter as a second stage to process the input signal. The SAR analog-to-digital converter includes a power adjustment element to adjust a reference voltage of the SAR analog-to-digital converter to match a full scale voltage of the pipeline-analog-to-digital converter.

System and method for integration of hybrid pipeline

Highly power efficient transmitter output stage designs are provided. In an embodiment, the probability density function (PDF) of an input signal is divided into a plurality of regions, and samples of the input signal are processed depending on the region of the PDF within which they fall. The PDF can be divided between an inner region corresponding to samples of the input signal that are within a predetermined amplitude range, and outer regions corresponding to samples of the input signal that are outside of the predetermined amplitude range. Samples of the input signal that fall in the inner region are processed by a class A biased amplifier and samples of the input signal that fall in the outer regions are processed by a class B biased amplifier. Output stage designs according to embodiments can be implemented as power amplifiers or power digital-to-analog converters (DACs).

High efficiency output stage amplification for radio frequency (RF) transmitters

Various pipeline ADCs are disclosed that substantially compensate for interference or distortion that results from imperfections with various ADC modules of the pipeline ADCs. The pipeline ADCs include various ADC stages and various compensation stages that are coupled to the various ADC stages. The various ADC stages convert their corresponding analog inputs from an analog signal domain to a digital signal domain to provide various digital output signals and various analog residual signals to subsequent ADC stages. The various compensation stages compensate for interference or distortion that is impressed onto the various analog residual signals which results from imperfections within previous ADC stages.

Successive equalizer for analog-to-digital converter (ADC) error correction

A line driver comprises a driving amplifier receiving an input of the line driver, a current sense resistor connected between the driving amplifier output and the line driver output, and a feedback amplifier sensing the voltage across the current sense resistor and providing a corresponding feedback voltage that is proportional to the output current to the driving amplifier, thereby determining an output impedance at the line driver output. Precise output impedance can be realized by using a high precision resistor as the current sense resistor, and using resistive feedback amplifiers with accurate gains as the driving and feedback amplifiers. The resistance of the current sense resistor can be substantially less than the line driver output impedance, and the driving amplifier output voltage swing can be substantially less than twice the line driver output voltage swing.

Line driver with active termination

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Irvine, CA, United States of America

Tianwei Li