Hon Hai Precision Industry Co., Ltd.

Tsinghua University

Tian-Fu Zhang

Qun-Qing Li

Yuan-Hao Jin

Ying-Cheng Wang

Xiao-Yang Xiao

Yu-Dan Zhao

Shou-Shan Fan

Yu-Jia Huo

Li-Hui Zhang

A method for making a graphene nanoribbon composite structure includes providing a substrate including a plurality of protrusions spaced apart from each other. A graphene film is grown on a growth substrate, an adhesive layer is on a surface of the graphene film away from the growth substrate. After removing the growth substrate, the graphene film and the adhesive layer are cleaned with water or an organic solvent. The graphene film, the adhesive layer, and the substrate are combined and then are dried, so that a plurality of wrinkles are formed near the plurality of protrusions. The adhesive layer is removed, and after etching a surface of the graphene film away from the substrate, the graphene films except for the plurality of wrinkles are removed, to form a plurality of graphene nanoribbons.

Graphene nanoribbon composite structure and method for making the same

A method for making a field effect transistor includes providing a graphene nanoribbon composite structure. The graphene nanoribbon composite structure includes a substrate and a plurality of graphene nanoribbons spaced apart from each other. The substrate includes a plurality of protrusions spaced apart from each other, and one of the plurality of graphene nanoribbons is on the substrate and between two adjacent protrusions. An interdigital electrode is placed on the graphene nanoribbon composite structure, and the interdigital electrode covers the plurality of protrusions and is electrically connected to the plurality of graphene nanoribbons.

Field effect transistor based on graphene nanoribbon and method for making the same

A method for making a field effect transistor includes providing a graphene nanoribbon composite structure. The graphene nanoribbon composite structure includes a substrate and a plurality of graphene nanoribbons spaced apart from each other. The plurality of graphene nanoribbons are located on the substrate and extend substantially along a same direction, and each of the plurality of graphene nanoribbons includes a first end and a second end opposite to the first end. A source electrode is formed on the first end, and a drain electrode is formed on the second end. The source electrode and the drain electrode are electrically connected to the plurality of graphene nanoribbons. An insulating layer is formed on the plurality of graphene nanoribbons, and the plurality of graphene nanoribbons are between the insulating layer and the substrate. A gate is formed on a surface of the insulating layer away from the substrate.

The disclosure relates to a method for making a photocatalytic structure, the method comprising: providing a carbon nanotube structure comprising a plurality of carbon nanotubes intersected with each other; a plurality of openings being defined by the plurality of carbon nanotubes; forming a photocatalytic active layer on the surface of the carbon nanotube structure; applying a metal layer pre-form on the surface of the photocatalytic active layer; and annealing the metal layer pre-form.

Method for making photocatalytic structure

The disclosure relates to a photocatalytic structure. The photocatalytic structure includes a substrate, a photocatalytic active layer, and a metal layer. The substrate, the photocatalytic active layer, and the metal layer are arranged in succession. The substrate includes a base and a patterned bulge layer on a surface of the base. The patterned bulge layer is a net-like structure comprising a plurality of strip-shaped bulges intersected with each other and a plurality of indents defined by the plurality of strip-shaped bulges. The plurality of strip-shaped bulges is an integrated structure. The photocatalytic active layer is on the surface of the patterned bulge layer. The metal layer includes a plurality of nanoparticles located on the surface of the photocatalytic active layer away from the substrate.

Photocatalytic structure and method for making the same

A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a nano-scale semiconductor structure. The second electrode is located on the second end.

Thin film transistor

The disclosure relates to a photocatalytic structure. The photocatalytic structure includes a carbon nanotube structure, a photocatalytic active layer coated on the carbon nanotube structure, and a metal layer including a plurality of nanoparticles located on the surface of the photocatalytic active layer. The carbon nanotube structure comprises a plurality of intersected carbon nanotubes and defines a plurality of openings, and the photocatalytic active layer is coated on the surface of the plurality of carbon nanotubes. The metal layer includes a plurality of nanoparticles located on the surface of the photocatalytic active layer.

A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode; the second end is located on the surface of the insulating substrate. The semiconducting structure is nano-scale semiconductor structure. The second electrode is located on the second end.

Schottky diode including an insulating substrate and a Schottky diode unit and method for making the same

A Schottky diode includes an insulating substrate and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating substrate. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating substrate. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.

Schottky diode

The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a gate on the substrate; a dielectric layer on the gate, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer formed by magnetron sputtering and in direct contact with the gate; a semiconductor layer on the dielectric layer, wherein the semiconductor layer includes nano-scaled semiconductor materials; and a source and a drain, wherein the source and the drain are on the dielectric layer, spaced apart from each other, and electrically connected to the semiconductor layer. The thin film transistor almost has no current hysteresis.

Thin film transistor and method for making the same

The disclosure relates to a thin film transistor and a method for making the same. The thin film transistor includes a substrate; a semiconductor layer on the substrate, wherein the semiconductor layer includes nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer on the semiconductor layer, wherein the dielectric layer includes a first sub-dielectric layer and a second sub-dielectric layer stacked on one another, and the first sub-dielectric layer is a first oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the first sub-dielectric layer. The thin film transistor almost has no current hysteresis.

A thin film transistor includes a gate electrode, a insulating medium layer and at least one Schottky diode unit. The at least one Schottky diode unit is located on a surface of the insulating medium layer. The at least one Schottky diode unit includes a first electrode, a semiconductor structure and a second electrode. The semiconductor structure comprising a first end and a second end. The first end is laid on the first electrode, the second end is located on the surface of the insulating medium layer. The semiconducting structure includes a carbon nanotube structure. The second electrode is located on the second end.

A thin film transistor includes a gate, an insulating medium layer and a Schottky diode. The Schottky diode includes a first electrode, a second electrode and a semiconducting structure. The first electrode is located on the surface of the insulating medium layer and includes a first metal layer and a second metal layer. The second electrode is located on the surface of the insulating medium layer and includes a third metal layer and a fourth metal layer. The semiconductor structure includes a first end and a second end. The first end is sandwiched by the first metal layer and the second metal layer, the second end is sandwiched by the third metal layer and the fourth metal layer. The semiconductor structure includes a carbon nanotube structure.

The disclosure relates to a logic circuit. The logic circuit includes two ambipolar thin film transistors. Each of the two ambipolar thin film transistors includes a substrate; a semiconductor layer located on the substrate and including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are located on the substrate, spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer located on the substrate and covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The two ambipolar thin film transistors share the same substrate, the same gate, and the same drain.

Logic circuit based on thin film transistor

The disclosure relates to a logic circuit. The logic circuit includes a n-type thin film transistor and a p-type thin film transistor. Each thin film transistor includes a substrate; a semiconductor layer including nano-scaled semiconductor materials; a source and a drain, wherein the source and the drain are spaced apart from each other, and electrically connected to the semiconductor layer; a dielectric layer covering the semiconductor layer, wherein the dielectric layer includes a normal dielectric layer and an abnormal dielectric layer stacked on one another, and the abnormal dielectric layer is an oxide dielectric layer grown by magnetron sputtering; and a gate in direct contact with the abnormal dielectric layer. The n-type thin film transistor and the p-type thin film transistor share the same substrate and the same gate.

Growing community of inventors

Beijing, China

Tian-Fu Zhang