Mellanox Technologies Denmark Aps

Mellanox Technologies, Ltd.

Thorkild Franck

Steen Bak Christensen

Johan Jacob Mohr

Ran Sela

Ulrik Wismar

Eyal David

Juan Jose Vegas Olmos

Chen Gaist

Allan Green-Petersen

Bjarke Vad Pedersen

Anders Nejdel

Afek Bernhard

An Integrated Circuit (IC) includes a digital phase-locked loop (DPLL) circuit and DPLL Diagnostics circuitry (DPLL-DC). The DPLL circuit includes an oscillator, a digital phase detector and a digital feedback bus (DPLL-DFB). The oscillator is configured to generate an output signal. The digital phase detector is configured to generate a digital feedback signal indicative of a phase difference between the output signal and a reference input signal. The DPLL-DFB is configured to feed-back the digital feedback signal for controlling the oscillator. The DPLL-DC is coupled to the DPLL-DFB and is configured to monitor events depending at least on the digital feedback signal transferred on the DPLL-DFB.

Test circuit for a digital phase-locked loop

Methods and apparatuses are provided for locking a transmitter oscillator to a reference clock signal in a frequency domain. The apparatus includes a digital phase-frequency detector. The digital phase-frequency detector includes a mod-M counter, a mod-N counter, and a count evaluation digital circuit. The mod-M counter is designed to count reference clock cycles of a reference clock signal. The mod-N counter is designed to count local clock cycles of a local clock signal. The count evaluation digital circuit is designed to compare the counted reference clock cycles and the local clock cycles with a predefined register setting to generate a control signal as a feedback signal. The control signal is transmitted to the transmitter oscillator through a frequency-locked loop circuit for adjusting the frequency of the transmitter oscillator to be consistent with the reference clock signal.

Method and apparatus for locking a transmitter oscillator to a reference clock signal in a frequency domain

Embodiments are disclosed for full-rate phase detection for a pulse amplitude modulation N (PAM-N) signal. The example method includes sampling an incoming signal in one or more sampling times. The example method further includes determining that an amplitude associated with a current sampling time is within an upper threshold and a lower threshold for each sampling time of the one or more sampling times. The example method further includes upon determining that the amplitude of the current sampling time is within the upper threshold and the lower threshold, determining an amplitude range associated with an immediately preceding sampling time and an amplitude range associated with an immediately subsequent sampling time. The example method further includes determining a transition status representing one of an upward transition, a downward transition, or no transition with respect to the current sampling time.

Method and apparatus for a selective pulse amplitude modulation signal phase detector

Embodiments are disclosed for generating a lookup table value for calibrating a lookup table circuit in an optical transmitter. The example method includes generating a calibration signal. The calibration signal encodes a plurality of bits in a number of amplitude levels. The example method further includes transmitting the calibration signal to a module under calibration and transmitting a symbol sequence of defined length to a reference module. The reference module compares the symbol sequence with a distorted signal received from the module under calibration to generate a set of condition count statistics. The example method further includes receiving the set of condition count statistics from the receiver in the reference module and calculating a lookup table value based on the set of condition count statistics. The example method further includes transmitting the lookup table value to a transmitter associated with the module under calibration.

Methods and apparatus for tuning lookup table circuits in a transmitter of optical and electrical communication systems

A circuit providing electrostatic discharge (ESD) protection and a method and an apparatus for testing ESD protection on an integrated circuit are described. The circuit includes a first ESD protection circuit and a test pad and a second ESD protection circuit and a second pad for the application, not probed during manufacturing of the integrated circuit. In some examples, the method includes providing a first, second, third, and fourth test current to the circuit providing ESD protection, measuring a first second, third, and fourth voltage drop across the circuit, and determining an operating condition for the first ESD protection circuit and the test pad and the second ESD protection circuit and the second bond pad based on expected values of the first voltage drop, the second voltage drop, the third voltage drop, and the fourth voltage drop.

Circuit for providing electrostatic discharge protection on an integrated circuit and associated method and apparatus

Embodiments are disclosed for equalizing a pulse amplitude modulation signal for a receiver in a communication system. An example method includes receiving an electronic signal. The electronic signal encodes a plurality of symbols in a number of amplitude levels in a plurality of pulses in the electronic signal. The example method further includes estimating multiple symbol values using all possible values of an immediately preceding symbol for each symbol in the electronic signal. Each estimated symbol value is determined using one of the possible values of the immediately preceding symbol. The example method further includes receiving an actual value of the immediately preceding symbol and selecting an actual estimated symbol value from the multiple symbol values based on the actual value of the immediately preceding symbol. The actual estimated symbol value may be used as the actual value for selecting an estimated symbol value of an immediately subsequent symbol.

Look ahead based method and apparatus for equalizing pulse amplitude modulation electronic signals

The invention comprises a multilevel optical signal system comprising two or more light source branches and an optical power-combiner, wherein each branch comprising a light source, an optical modulator and an electrical driver for the modulator, wherein each electrical driver is configured for being driven by electrical signals to drive the modulator to modulate the light generated by the light source into a corresponding 2-level data signal such that the respective 2-level data signals differs in power level.

Multilevel optical signal system

The present invention relates to a flexible method of provide chips for optical interconnect with different number of channels.

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Roskilde, Denmark

Thorkild Franck