Taiwan Semiconductor Manufacturing Comp. Ltd.

California Institute of Technology

Imec

Thomas Y Hoffman

Axel Scherer

Yasutoshi Okuno

Matty Caymax

Geert Hellings

Niamh Waldron

Lars-Ake Ragnarsson

Tom Schram

Naohisa Sengoku

Joshua Tseng

Stefan Kubicek

Theodore Doll

A method for manufacturing a dual work function semiconductor device includes forming a first silicon oxide layer on a substrate and forming a first hafnium-containing dielectric material layer on the first silicon oxide layer. The method further includes forming an aluminum-containing dielectric material layer on the first hafnium-containing dielectric material layer and performing a thermal treatment to intermix the silicon oxide layer, the first hafnium-containing dielectric material layer and the aluminum-containing dielectric material layers. This results in an intermixing dielectric layer containing hafnium, aluminum, silicon, and oxygen. The method further includes forming a first metal-containing conductive layer on the intermixing dielectric layer and patterning the first metal-containing conductive layer and the intermixing dielectric layer, thereby forming a first gate stack in a first region.

Method for manufacturing a dual work function semiconductor device and the semiconductor device made thereof

Disclosed are methods for forming hybrid metal-oxide-semiconductor field effect transistors (MOSFETs) and the hybrid MOSFETS thus obtained. In one embodiment, a method is disclosed that includes providing a first substrate comprising a first region and a second region, providing a second substrate comprising a second semiconductor layer and an insulating layer overlaying the second semiconductor layer, and direct substrate bonding the second substrate to the first substrate, thereby contacting the first region and the second region with the insulating layer. The method further includes selectively removing the second semiconductor layer and the insulating layer in the first region, thereby exposing the first semiconductor layer in the first region, forming a first gate stack of a first MOSFET on the exposed first semiconductor layer in the first region, and forming a second gate stack of a second MOSFET on the second semiconductor layer in the second region.

Method for manufacturing a hybrid MOSFET device and hybrid MOSFET obtainable thereby

Lateral pores in a thin metal film as well as fabricating branching and expanding ore arrays can be fabricated by a method of growing long pores laterally underneath a ask by use of stress compliant masks or varying the anodization voltage. Applications range from use with scanning electron microscope (SEM-compatible single molecule probe stations), to nanowire fixtures and to the use with a &ldquo;pixelating, nonscanning&rdquo; near field optical microscope (NOM). Pores are defined by conventional anodization vertically into the underlying membrane of preporous material through any overlying masking layers. The general solution is to utilize mechanically stable masks that withstand the stress during anodization and counteract the pore formation stress to lead to good pore ordering and directed growth. Multilayer masks are well suited for this. With a composition of materials having different elastic properties, tensile stress can be matched to counteract compressive stress caused by porous material growth. The boundary stress problem between preporous and porous material is solved by using a planarizing mask material that provides locally increased masking layer thickness at the critical boundary between nonporous and porous material in the film.

Method of fabricating lateral nanopores, directed pore growth and pore interconnects and filter devices using the same

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Leuven, Belgium

Thomas Y Hoffman