Anadigics, Inc.

Skyworks Solutions, Inc.

Thomas William Arell

Henry Liwinski

Osvaldo J Lopez

Joel Lott

Mahendra Singh

Sheldon Xu

Mohammed Ali Khatibzadeh

A power amplifier comprising a bipolar transistor connected in cascode with a field effect transistor (FET) such as a pseudomorphic high electron mobility transistor (PHEMT) device. The bipolar transistor has a common emitter and the FET a common gate. Advantageously, the bipolar transistor is a heterojunction bipolar transistor (HBT); and the HBT and the FET may be integrated on a single die. Illustrative materials for the HBT and FET are Gallium Nitride, Indium Phosphide, or Gallium Arsenide/Indium Gallium Phosphide.

Cascode power amplifier stage using HBT and FET

A limiter circuit is integrated into an RF power amplifier. The limiter circuit automatically starts adding attenuation at the input of the RF power amplifier after a predetermined input power level threshold is exceeded, thereby extending the safe input drive level to protect the amplifier. In a preferred embodiment of the invention, the limiter circuit is implemented using a pseudomorphic high electron mobility transistor (PHEMT) device or a metal semiconductor field effect transistor (MESFET) device. Diode connected transistors or Schottky diodes may also be used in the limiter circuit.

Integrated RF limiter

A limiter circuit is integrated into an RF power amplifier. The limiter circuit automatically starts adding attenuation at the input of the RF power amplifier after a predetermined input power level threshold is exceeded, thereby extending the safe input drive level to protect the amplifier. In a preferred embodiment of the invention, the limiter circuit is implemented using a pseudomorphic high electron mobility transistor (PHEMT) device or a metal semiconductor field effect transistor (MESPET) device. Diode connected transistors or Schottky diodes may also be used in the limiter circuit.

A radio frequency (RF) coupling circuit for coupling an RF output of a quadrature combined amplifier. According to an embodiment, the RF coupling circuit includes a phase shifting component and a coupling network. The phase shifting component provides a predetermined phase shift to an RF signal at a first output terminal of the quadrature combined amplifier. The coupling network combines the phase shifted first output signal with an RF signal at a second output terminal of the quadrature combined amplifier.

RF directional coupled output from a quadrature combined amplifier

A multi-stage RF/Microwave power amplifier circuit is provided that is capable of operating efficiently at multiple output power levels. The amplifier comprises first and second amplifying stages, an output impedance matching network connected to the output of first amplifying stage and an interstage impedance matching network connected between the outputs of said first and second amplifying stages. In a high power mode, the first amplifying stage is enabled and the second amplifying stage is disabled and the output and interstage impedance matching networks present a first value of the output impedance that improves the efficiency of the first amplifying stage. In a low power mode, the first amplifying stage is disabled and the second amplifying stage is enabled, and output and interstage impedance matching networks present a second value of the output impedance that improves the efficiency of the second amplifying stage.

Multi-stage power amplifier with enhanced efficiency

A low-loss Radio Frequency (RF) switch for high-power RF signals. The RF switch includes a first-biasing circuit connected to a first transistor and a second-biasing circuit connected to a second transistor. The RF switch switches its output signal between a first input signal and a second input signal. The first transistor is in a conduction state and the second transistor is in a non-conduction state when the first input signal is to be conducted to the output signal. The first-biasing circuit biases the first transistor at a first voltage for increasing conduction of the first input signal and the second-biasing circuit biases the second transistor at a second voltage for decreasing conduction of the first input signal. Moreover, the second transistor is in a conduction state and the first transistor is in a non-conduction state when the second input signal is to be conducted to the output signal.

High-power switch

A power amplifier with a multi-mode digital bias control circuit is provided. The power amplifier utilizes a complementary reference voltage generation circuit and a bias current-control circuit to generate a plurality of bias current levels for different output power levels. In an embodiment of the present invention, the power amplifier circuit is connected to a reference voltage and two control signals. Depending on the desired output power level, the control signals set the corresponding bias current in the amplifying transistors, to ensure sufficient linearity. The power amplifier is capable of operating at a very low quiescent current level, for example, 5 mA. As a result, a significant improvement in the power amplifier's overall efficiency is achieved, and the battery talk time of a wireless communication device is increased. The invention finds application in wireless communication devices such as CDMA, WCDMA, EDGE and WLAN mobile devices.

Multi-mode digital bias control for enhancing power amplifier efficiency

There is disclosed a bias circuit exhibiting good stability over variations in temperature and power supply voltage and capable of generating a plurality of discrete levels of output current for biasing RF power amplifier. In accordance with the invention, the bias circuit includes (1) a master transistor connected to the slave transistor in a current-mirror configuration and having two parallel-connected transistor elements, (2) a switch connected to at least one transistor element to control its operation, and (3) a feedback circuit by which the voltage at the collector of the master transistor may be fed back to control the voltages at the bases of the master transistor and the slave transistor. Moreover, the bias circuit can be operated from a power supply voltage that is just above twice the value of the base-emitter voltage of the transistor in the circuit.

Multi-mode amplifier bias circuit

An active clamping circuit for a multi-stage power amplifier includes a feedback circuit which affects the gain of the amplifier. The feedback circuit feeds an output via a filter and a clamping transistor to an input of at least one stage of the power amplifier. The output fed to the filter and clamping transistor may be tapped from one or more diodes belonging to a diode stack connected to the power amplifier's output.

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Basking Ridge, NJ, United States of America

Thomas William Arell