Hewlett-packard Development Company, L.p.

International Business Machines Corporation

Compaq Computer Corporation, Inc.

Tandem Computers Incorporated

Thomas W Collins

Dale W Hopkins

Steven W Wierenga

Michael John Sabin

Susan K Langford

W Dale Hopkins

Ralph Bestock

John Gregory

Larry M Hines

Karl R Hense

Michael Garwood Hurley

Kay Beharat Mehta

Lung-jo Tao

Ruth A Wang

A method and apparatus are disclosed for improving public key encryption and decryption schemes that employ a composite number formed from three or more distinct primes. The encryption or decryption tasks may be broken down into sub-tasks to obtain encrypted or decrypted sub-parts that are then combined using a form of the Chinese Remainder Theorem to obtain the encrypted or decrypted value. A parallel encryption/decryption architecture is disclosed to take advantage of the inventive method. REEXAMINATION RESULTS The questions raised in reexamination request No./,, filed May,and reexamination request No./,, filed on Jul.,, have been considered and the results thereof are reflected in this reissue patent which constitutes the reexamination certificate required byU.S.C.as provided inCFR.()

Public key cryptographic apparatus and method

A method is disclosed for performing cryptographic tasks, that include key setup tasks and work data processing tasks. This method comprises the steps of processing the key data in a first cryptographic engine and processing the work data in a second cryptographic engine. The processing of the key data comprises the steps of receiving key data, processing the key data, and generating processed key data. The processing of the work data comprises the steps of receiving the processed key data, receiving work data, processing the work data, and outputting the processed work data. In this method of the invention, the first cryptographic engine performs its tasks independently of the second cryptographic engine. A method for allocating cryptographic engines in a cryptographic system is also disclosed comprising monitoring a queue of cryptographic tasks, monitoring activity levels of a first allocation of a plurality of cryptographic engines, and dynamically adjusting the first allocation.

Cryptographic key setup in queued cryptographic systems

A method and apparatus are disclosed for improving public key encryption and decryption schemes that employ a composite number formed from three or more distinct primes. The encryption or decryption tasks may be broken down into sub-tasks to obtain encrypted or decrypted sub-parts that are then combined using a form of the Chinese Remainder Theorem to obtain the encrypted or decrypted value. A parallel encryption/decryption architecture is disclosed to take advantage of the inventive method.

Multiprime RSA public key cryptosystem

A process is provided for searching in parallel for a plurality of prime number values simultaneously includes the steps of: randomly generating a plurality of k random odd numbers (wherein k is preferably more than 2, but could also be one or more) expressed as n, n, . . . n, each number providing a prime number candidate; determining a plurality of y additional odd numbers based on each one of the randomly generated odd numbers n, n, . . . nto provide additional prime number candidates thereby yielding a total number of prime number candidates; sieving the total number of prime number candidates by performing a small divisor test on each of the candidates in order to eliminate candidates revealed to be composite numbers by the small divisor test thereby yielding a sieved number s of candidates; and performing a first probabilistic primality test on each of the sieved number s of candidates, each of the plurality of s first primality tests including an associated exponentiation operation executed by an associated one of a plurality of s of the exponentiation units, the exponentiation operations being performed by the plurality of s exponentiation units substantially simultaneously in order to eliminate candidates revealed to be composite numbers by the primality test thereby yielding a remaining number r of candidates.

Multiple prime number generation using a parallel prime number search algorithm

A method is provided for generating a group digital signature wherein each of a group of individuals may sign a message M to create a group digital signature S, wherein M corresponds to a number representative of a message, 0&#x2266;M&#x2266;n&#x2212;1, n is a composite number formed from the product of a number k of distinct random prime factors p&#xb7;p&#xb7; . . . &#xb7;p, k is an integer greater than 2, and S&#x2261;M(mod n). The method may include: performing a first partial digital signature subtask on a message M using a first individual private key to produce a first partial digital signature S; performing at least a second partial digital signature subtask on the message M using a second individual private key to produce a second partial digital signature S; and combining the partial digital signature results to produce a group digital signature S.

Group signature generation system using multiple primes

Ownership of a secure process is enabled with a cryptographic system. Methods initializing and operating the cryptographic system transfer control from the loading program to the loaded program and, in essence from the cryptographic system vendor to its end-user. As a result, ownership of the secure process can be relinquished to the end-user so that it alone can subsequently use the cryptographic system to control the secure process of loading and running its user-programs. The cryptographic system and methods allow for secure operations and protect against tampering with application software. The application program is retrieved from an encrypted file in external memory and authenticated by the cryptographic system before being executed.

Cryptographic system enabling ownership of a secure process

A method and apparatus provides cryptographic parameters for use in cryptographic applications in response to requests therefor. The method includes the steps of: pre-computing one or more different types of sets of cryptographic parameters, each the type of set being adapted for use by an associated type of cryptographic application; securely storing the pre-computed sets of cryptographic parameters in a memory storage unit; receiving a request for a set of cryptographic parameters having specified characteristics for use in a particular cryptographic application; determining one of the sets of cryptographic parameters stored in the memory storage unit that has specified characteristics; accessing the determined set of cryptographic parameters from the memory storage unit; and providing the determined set of cryptographic parameters with minimal latency.

Multiple cryptographic key precompute and store

A cryptographic system and method for encrypting and decrypting data using public key cryptography. The encryption and decryption may be divided into tasks that may operate in parallel. A secure method of initializing the cryptographic system to allow for secure operations and protect against tampering with application software. The application program is retrieved from an encrypted file in external memory and authenticated before being executed.

Cryptographic system

A passive replicator for bubble devices receives a bubble from an input channel and splits that bubble into two bubbles which go into two separate output channels when a rotating magnetic field is applied. The bubble replicator is a single element which has at least three peripheral areas in spaced relation that are associated with different propagation channels. In preferred embodiments, an elongated bar is present in the propagation channels and it is positioned adjacent to and in spaced relation with a peripheral area of the replicator.

Magnetic bubble passive replicator

A major/minor loop bubble memory system architecture includes a passive replicator in the major loop read channel which is connected by a first path to a mode switch-annihilator and a merge point in the major loop write channel and by a second path to an off-chip decision-making means and the merge point in the write channel. The decision-making means is positioned the same or fewer propagation steps than the mode switch-annihilator is from the replicator. The decision making means is activated to cause either the replicated data to pass through the mode switch-annihilator into the write channel or the replicated data to be annihilated in the mode switch-annihilator and the data from a generator to pass into the write channel.

High performance bubble chip architecture

A magnetic bubble Y-bar corner for use at the end of a minor loop. The Y-bar corner includes a Y-bar corner element and a canted I-bar positioned between the Y-bar corner element and each of the two adjacent storage elements in the minor loop. The ends of the arm of the Y-bar corner element are positioned adjacent the apex portions of the canted I-bars. The distance between the ends of the arms of the Y-bar is larger than the distance between the opposing ends of the two canted I-bars. With this corner a bubble propagates in either direction along a path from a minor loop storage element to the end of the canted I-bar and then to the apex portion of the canted I-bar and from there across to the end of the arm of the Y-bar.

Magnetic bubble Y-bar corner

A magnetic bubble switch operates in a drive-to-transfer mode when a rotating magnetic field is applied. The switch has a magnetic element in the shape that defines the letter 'Y' having two arms and a stem. The switch has at least one serration on the arm of the Y in the vicinity of the stem. The switch has a conductor which is positioned across the end of the stem of the Y. A magnetic element is positioned so as to form a gap with the stem of the Y.

Serrated Y-bar magnetic bubble switch

Operating circuitry for linear charge launching, non-destructive weighting and non-destructive charge sensing for Charge Coupled Devices (CCD) employs electronic integrating circuitry at the input and output node terminals of the CCD. Feedback circuitry within the integrating circuitry aids in linearizing the signals, in eliminating the non-linear capacitance effect of the depletion regions, and in freeing the design from device parameter variations such as electrode area and absolute values of threshold potential and thickness of insulating layer. The circuitry is adaptable to most conventional CCD and is readily made up of conventional resistance and capacitance elements, of conventional comparing circuits such as differential amplifying or signal repeating circuits, and of conventional summing circuitry.

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Saratoga, CA, United States of America

Thomas W Collins