Chartered Semiconductor Manufacturing Ltd (corporation)

Thomas Schulue

Ramasamy Chockalingam

Paul Kwok Keung Ho

Raymond Joy

Ba Tuan Pham

Premachandran Vayalakkara

Wai Lok Lee

A new method of etching metal lines with reduced microloading effect is described. Semiconductor device structures are provided in and on a semiconductor substrate and covered with an insulating layer. A barrier metal layer is deposited overlying the insulating layer and a metal layer is deposited overlying the barrier metal layer. The metal layer is covered with a photoresist mask wherein there are both wide spaces and narrow spaces between portions of the photoresist mask. The metal layer is etched away where it is not covered by the photoresist mask wherein the barrier metal layer is reached within the wide spaces while some of the metal layer remains within the narrow spaces. The metal layer remaining within the narrow spaces is selectively etched away. Thereafter, the barrier metal layer not covered by the photoresist mask is etched away wherein the insulating layer is reached within the wide spaces while some of the barrier metal layer remains within the narrow spaces. The barrier metal layer remaining within the narrow spaces is selectively etched away. Thereafter, the insulating layer not covered by the photoresist mask is overetched to complete the metal lines without microloading in the fabrication of an integrated circuit.

Growing community of inventors

Singapore, Singapore

Thomas Schulue