International Business Machines Corporation

Thomas S Parker

Mark Wayne Mueller

Douglas Marvin Benignus

Dennis G Busch

Robert A Vossman

James L Frye

Suzanne K Baird

Astrid P Jeffries

A communication system is provided in which one data transmitting display terminal has the capability of transmitting a data stream in coded form to at least one data receiving terminal over a communication linkage. This data transmitting terminal further includes the capability of displaying, when necessary, the stream of coded data directly on its display so that if there is a transmission problem, the coded data itself can be analyzed in diagnosing the problem. The present communications system has the further capability of diagnosing data streams at remote display terminals. For example, if one transmitting terminal is communicating with a receiving terminal and a problem arises between the two terminals, the system provides the capability of the transmitting terminal sending the data stream to another receiving terminal remote from the first two terminals. This remote receiving terminal is a display terminal having the capability of displaying the received stream of coded data whereby the problems between the two communicating terminals may be diagnosed at a remote location where better engineering support may be available.

Data communication system with terminal for displaying the coded stream

A communication adapter circuit (10) is connected to a processor through a data bus (12)and a control bus (14). Data and control signals are provided through the buses (12,14) to a timer circuit (18), a programmable peripheral interface circuit (20), an asynchronous and bisynchronous control circuit (22) and an SDLC/HDLC control circuit (24). Each of the control circuits (22, 24) includes parallel-to-serial and serial-to-parallel conversion circuitry. A clock select circuit (32) operates in conjunction with the timer circuit (18) and the programmable peripheral interface circuit (20) to establish a data transmission rate for the data flow through the adapter circuit (10). From the control circuits (22, 24) the data is transmitted through a bi-directional serial line (44) to a dual modem switch (56). From the switch (56) the data is transmitted to either an EIA interface circuit (60) to a conventional modem or through a line (64) to an internal modem.

Communication adapter circuit

A communication adapter circuit (10) is connected to a processor through processor I/O interface buses (12, 14). Data and control signals are provided through the buses (12, 14) to a timer circuit (18), a programmable peripheral interface circuit (20), an asynchronous and bisynchronous control circuit (22) and an SDLC/HDLC control circuit (24). Each of the control circuits (22, 24) includes parallel-to-serial and serial-to-parallel conversion circuitry. A clock select circuit (32) operates in conjunction with the timer circuit (18) and the programmable peripheral interface circuit (20) to establish a data transmission rate for the data flow through the adapter circuit (10). From the control circuits (22, 24) the data is transmitted through a modem interface bus (44) to a dual modem switch (56). From the switch (56) the data is transmitted to either an EIA RS 232 interface circuit (60) to a conventional modem or through a bus (64) to an internal modem. A phase locked loop (PLL) circuit in the control circuit (24) generates a data clock signal on a line (33) for operation of the adapter circuit (10) in the bisynchronous protocol with a non-clock-generating modem.

Bisynchronous host/terminal communication system with

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Cedar Park, TX, United States of America

Thomas S Parker