Honeywell International Inc.

Alliedsignal Inc.

Thomas R Keyser

Cheisan J Yue

Grenville Hughes

Glen Aaron Sanders

Lee Kevin Strandjord

Gerald D Becker

Robert E Higashi

Todd A Randazzo

Andy M Peczalski

Lianzhong Yu

Ronald James Jensen

Gordon Alan Shaw

Mohammed A Fathimulla

Bradley J Larsen

Ken L Yang

A method of forming nanotube contact structures may include forming an interconnect layer over a portion of a layer of a microelectronics device and forming a nanotube layer over a portion of the interconnect layer. The nanotube layer may define openings through the nanotube layer. The method also may include forming self-aligned electrodes in the openings of the nanotube layer such that the self-aligned electrodes are formed only in openings in the nanotube layer that substantially reside over metal filled vias of the microelectronics device. In some examples, the self-aligned electrodes may be formed on the metal in the vias, and the self-aligned electrodes may not be formed in openings that do not reside over the metal filled vias.

Method of making self-aligned nanotube contact structures

A method of forming CMOS circuitry integrated with MEMS devices includes bonding a wafer to a top surface layer having contacts formed to CMOS circuitry. A handle wafer is then removed from one of the top or bottom surfaces of the CMOS circuitry, and MEMS devices are formed in a remaining silicon layer.

Integration of MEMS and CMOS devices on a chip

A hypersensitive semiconductor die structure is disclosed, in which flip-chip packaging is used in conjunction with a modified SOI die in which a thick silicon support substrate has been removed to increase sensitivity of the sensing device. Rather than being located beneath layers of interconnects and dielectric, the disclosed structure places the sensing devices close to the surface, more closely exposed to the environment in which sensing is to occur. The structure also allows for the placement of sensing films on nearer to the sensing devices and/or an oxide layer overlying the sensing devices.

SOI on package hypersensitive sensor

A method of fabricating a neutron detection structure includes temporarily bonding a carrier to a passivated SOI SRAM wafer, removing a first substrate, depositing a conversion layer where at least a portion of the first substrate was removed, permanently bonding a second substrate to the conversion layer, removing the carrier, and providing at least one electrical contact to the device layer. A method of fabricating a neutron detection structure, corresponding to an alternate embodiment, includes temporarily bonding a carrier to a passivated SOI SRAM wafer, removing a first substrate, depositing a conversion layer onto a second substrate, permanently bonding the coated substrate where at least a portion of the first substrate was removed, removing the carrier, and providing at least one electrical contact to the device layer.

Neutron detection structure and method of fabricating

A neutron detection structure built from a Silicon-On-Insulator memory cell includes a conversion layer for converting incident neutrons into emitted charged particles, a device layer for receiving the emitted charged particles, a buried oxide layer separating the conversion layer from the device layer and directly adjacent to the conversion layer and the device layer, an isolation layer, a passivation layer formed on the isolation layer opposite the device layer and buried oxide layer, a carrier adhered by an adhesion layer to the passivation layer opposite the isolation layer, and a plurality of conductive contacts to provide electrical contact to the device layer. A corresponding method for fabricating such a structure includes permanently bonding a carrier to a passivated SOI SRAM wafer, removing an insulative substrate, depositing a conversion layer where at least a portion of the insulative substrate was removed, and forming at least one opening in the conversion layer and the buried oxide layer to provide at least one electrical contact to the device layer.

Neutron detection structure

An optical device can be fabricated by forming a silicon rib, such as a poly-silicon rib, on a SOI substrate so that a portion of the SOI substrate is exposed, and by forming silicon spacers, such as amorphous or poly-silicon spacers, that round off corners of the silicon rib.

Silicon optical device

Methods and apparatus are provided for a low cost optical gyro using thin film waveguides to direct light beams among the components of the gyro. The gyro includes a substrate having an insulator layer, a silicon waveguide formed on the insulator layer, and a resonator coupled to the silicon waveguide and configured to circulate a portion of a first light beam in a first counter-propagating direction and circulate a portion of a second light beam in a second counter-propagating direction. The first silicon waveguide propagates the first and second light beams therethrough. Each of the first and second light beams has a resonance frequency when circulating in the resonator.

Integrated optical rotation sensor and method for sensing rotation rate

An optoelectronic coupling structure, a method of manufacture, and a method of operation are described. The optical coupling structure includes a waveguide that is formed within a device layer of an SOI substrate. A prism is located on a bottom side of the SOI substrate. A BOX layer of the SOI substrate, which is interposed between the prism and the waveguide, serves as a spacer region, which promotes an optical coupling of the prism to the waveguide. By positioning the prism below the waveguide, an optoelectronic IC may more readily accommodate a prism. The prism may be directly fabricated in a bulk layer of the SOI substrate or directly bonded to a bottom side surface of the BOX layer.

Optical coupling structure

Methods and systems for growing uniform oxide layers include an example method including growing a first layer of oxide on first and second facets of the substrate, with the first facet having a faster oxide growth rate. The oxide is removed from the first facet and a second oxide layer is grown on the first and second facets. Removing the oxide from the first facet includes shielding the second facet and exposing the substrate to a deoxidizing condition. The second facet is then exposed to receive the second oxide layer. Areas having differing oxide thicknesses are also grown by repeatedly growing oxide layers, selectively shielding areas, and removing oxide from exposed areas.

System and method for uniform multi-plane silicon oxide layer formation for optical applications

Methods and apparatus are provided for a low cost optical gyro with a free space closed optical path. A ring resonator comprises a substrate and reflectors formed or placed on the substrate. The reflectors comprise a closed optical path and are configured to direct each of first and second light beams in a different counter-propagating direction in the closed optical path. Each of the first and second light beams frequencies are tuned to the resonance frequency of the resonator in the direction of propagation for which the light beam is circulating in the closed optical path.

Optical gyro with free space resonator and method for sensing inertial rotation rate

The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. The silicon layers have high free carrier mobility. In one aspect of the invention a single crystal silicon material is bonded to a thin-film dielectric material to form a silicon-insulator-silicon thin-film structure for an optical modulator.

Bonded thin-film structures for optical modulators and methods of manufacture

The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. The silicon layers have high free carrier mobility. In one aspect of the invention a high mobility silicon layer can be provided by crystallizing an amorphous silicon layer. In another aspect of the invention, a high mobility silicon layer can be provided by using selective epitaxial growth and extended lateral overgrowth thereof.

Silicon-insulator-silicon thin-film structures for optical modulators and methods of manufacture

The present invention provides silicon based thin-film structures that can be used to form high frequency optical modulators. Devices of the invention are formed as layered structures that have a thin-film dielectric layer, such as silicon dioxide, sandwiched between silicon layers. In one aspect of the invention an electrical contact structure is provided. The electrical contact structure comprises a connecting portion that electrically connects an active region of at least one of the silicon layers to a contact portion of the electrical contact structure.

Low loss contact structures for silicon based optical modulators and methods of manufacture

A semiconductor device has a silicon layer and a first dielectric layer. A transistor has a drain and a source that are at least partially in the silicon layer. The transistor further has a gate and a spacer defining the gate. The first dielectric layer forms the spacer. A capacitor has first and second electrodes, the first electrode is formed at least partially in the silicon layer, and the first dielectric layer provides a dielectric for the capacitor between the first and second electrodes. A resistor has a resistive region formed at least partially in the silicon layer and has first and second resistor contact areas defined by the first dielectric layer. A second dielectric layer electrically isolates the transistor, the capacitor, and the resistor from conductive lines.

Integrated structure with microwave components

An RF semiconductor device is fabricated from a starting substrate comprising a polysilicon handle wafer, a buried oxide layer over the polysilicon handle wafer, and a silicon layer over the oxide layer.

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Ellicott City, MD, United States of America

Thomas R Keyser