Advantech Global, Ltd

Other

Westinghouse Electric Corporation

Magnascreen Corporation

Samsung Electronics Co., Ltd.

Thomas Peter Brody

Joseph A Marcanio

Paul R Malmberg

Fang-Chen Luo

David H Davies

Juris A Asars

Timothy A Cowen

Jan Bernkopf

Heribert J Reitboeck

Jeffrey W Conrad

David J Stapleton

Electronic devices are formed on a substrate that is advanced stepwise through a plurality of deposition vessels. Each deposition vessel includes a source of deposition material and has at least two shadow masks associated therewith. Each of the two masks is alternately positioned within the corresponding deposition vessel for patterning the deposition material onto the substrate through apertures in the mask positioned therein, and positioned in an adjacent cleaning vessel for mask cleaning. The patterning onto the substrate and the cleaning of at least one of the masks are performed concurrently.

Method and apparatus for electronic device manufacture using shadow masks

A system and method for providing an active array of temperature sensing and cooling elements, including an active heatsink which further includes an active temperature sensing layer, a thermoelectric cooling layer, and a heatsink, which further includes a plurality of cooling channels. The temperature sensing element within the active temperature sensing layer includes a plurality of switching transistors, a linear transistor, a current sense resistor, a thermistor, a voltage sensing bus, a voltage setting bus, a current measurement bus, a measurement switching bus, a sense control bus, a storage capacitor, and a supply voltage, all under the control of a process control computer. The method of using an active array of temperature sensing and cooling elements includes the steps of aligning the shadow mask, depositing the material, detecting a thermal gradient, and controlling the thermoelectric cooling.

System for active array temperature sensing and cooling

An electronic circuit with repetitive patterns formed by shadow mask vapor deposition includes a repetitive pattern of electronic circuit elements formed on a substrate. Each electronic circuit element includes the following elements in the desired order of deposition: a first semiconductor segment, a second semiconductor segment, a first metal segment, a second metal segment, a third metal segment, a fourth metal segment, a fifth metal segment, a sixth metal segment, a first insulator segment, a second insulator segment, a third insulator segment, a seventh metal segment, an eighth metal segment, a ninth metal segment and a tenth metal segment. All of the above segments may be deposited via a shadow mask deposition process. The electronic circuit element may be an element of an array of like electronic circuit elements.

Electronic circuit with repetitive patterns formed by shadow mask vapor deposition and a method of manufacturing an electronic circuit element

Evaporated receptacles for inkjet deposited polymeric light-emitting diode (PLED)/organic light-emitting diode (OLED) and a method of making the same. The evaporated receptacles are formed via a shadow mask vacuum deposition process. The method of forming a light-emitting display includes forming an electrode on a substrate, forming a receptacle structure over the electrode via a shadow mask vacuum deposition process, and delivering a quantity of polymeric solution, which contains a light-emitting material, into the receptacle via a standard inkjet deposition process.

Receptacles for inkjet deposited PLED/OLED devices and method of making the same

In a method of forming an electrical circuit assembly, a substrate is provided including a plurality of first segments that form an electrical circuit. The first segments have surfaces that rise above surfaces of other segments that form the electrical circuit. All of the segments are deposited on the substrate via one or more shadow mask vapor deposition processes in a vacuum. A photoresist caused to cover all of the segments is hardened and then abraded until surfaces of the first segments are exposed, but surfaces of the other segments are not exposed, and a surface of the abraded photoresist is at the same level as the exposed surfaces of the first segments. Second segments can be deposited on the exposed surfaces of the first segments via a shadow mask vapor deposition process in a vacuum to a level above the top surface of the abraded photoresist.

Method of forming an electrical circuit with overlaying integration layer

A shadow mask deposition system includes a plurality of identical shadow masks arranged in a number of stacks to form a like number of compound shadow masks, each of which is disposed in a deposition vacuum vessel along with a material deposition source. Materials from the material deposition sources are deposited on the substrate via openings in corresponding compound shadow masks, each opening being formed by the whole or partial alignment of apertures in the shadow masks forming the compound shadow mask, to form an array of electronic elements on the substrate.

Shadow mask deposition of materials using reconfigurable shadow masks

An LCD pixel includes a first conductive segment connected to a first bus, a first insulator segment on the first conductive segment, a second conductive segment on the first insulator segment, a liquid crystal material on the second conductive segment, a third conductive segment on the liquid crystal material, and a thin film transistor having a control terminal, a first power terminal and second power terminal connected to a second bus, a third bus and the second conductive segment, respectively. In response to application of a suitable signal on the second bus when reference voltages are present on the first bus and on the third conductive segment, and a voltage is applied to the third bus, the thin film transistor is operative for charging a capacitor formed by the first conductive segment, the first insulator segment and the second conductive segment and for activating the liquid crystal material.

Shadow mask deposition system for and method of forming a high resolution active matrix liquid crystal display (LCD) and pixel structures formed therewith

The present invention is a two-layer shadow mask with small dimension apertures and method of making and using same. The two-layer shadow mask of the present invention is suitable for use for manufacturing an electronic device via deposition in a production system. The two-layer shadow mask of the present invention is formed by a first thick mask, which includes a plurality of apertures that has been formed, for example, by etching, bonded to a second, comparatively thin mask, that has been formed by an electrolytic process, and which includes a plurality of apertures that has been patterned by a photoresist. The second mask is aligned and bonded atop the first mask, with their respective apertures desirably offset one to another. The offset amount of the respective apertures of the two-layer shadow mask determines the resulting final aperture dimension, which may approach 0 microns, through which material is deposited upon a substrate in a deposition production system.

Two-layer shadow mask with small dimension apertures and method of making and using same

A multi-layer electronic device can be formed to include an insulative substrate (), a first vapor deposited conductor layer () on the insulative substrate (), a first vapor deposited insulator layer () on the first conductor layer (), the first insulator layer () having at least one via hole () therein, and a vapor deposited conductive filler () in the via hole () of the first insulator layer (). Desirably, the conductive filler () is deposited in the via hole () of the first insulator layer () such that the surface of the conductive filler () opposite the first conductor layer () is substantially planar with the surface of the first insulator layer () opposite the first conductor layer ().

System for and method of planarizing the contact region of a via by use of a continuous inline vacuum deposition

In a shadow mask vapor deposition system, a first conductor is vapor deposited on a substrate and an insulator is vapor deposited on the first conductor. A second conductor is then vapor deposited on at least the insulator. The insulator layer is plasma etched either before or after the vapor deposition of the second conductor to define in the insulator layer a via hole through which at least a portion of the first conductor is exposed. An electrical connection is established between the first and second conductors by way of the via hole.

System for and method of forming via holes by use of selective plasma etching in a continuous inline shadow mask deposition process

A system and method for active array temperature sensing and cooling. The system includes an active temperature sensing layer, a thermoelectric cooling layer and a heatsink layer. The temperature sensing layer is formed of temperature sensing elements that sense the temperature gradient across an unevenly heated region of the active array substrate. The thermoelectric cooling layer controls the temperature gradient sensed by the temperature sensing layer. The heatsink layer includes a plurality of cooling channels for absorbing thermal energy from the unevenly heated region. The system is under the control of a process control computer.

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Pittsburgh, PA, United States of America

Thomas Peter Brody